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  1. Uglickich Evženie, Nagy Ivan :  Prediction of overdispersed count data using real-time cluster-based discretization of explanatory variables , Informatics in Control, Automation and Robotics. ICINCO 2021 : Revised Selected Papers, p. 163-184 , Eds: Gusikhin O., Madani K., Nijmeijer H., ICINCO 2021 : International Conference on Informatics in Control, Automation and Robotics /18./, (online, CH, 20210706) [2023] Download DOI: 10.1007/978-3-031-26474-0_9
  2. Plíhal Jiří, Nedoma P., Herda Z., Aksjonov A. :  Vehicle systems from an Artificial Intelligence perspective: Testing & Use Cases, ELIVA PRESS, (Chișinău 2022) [2022] Download
  3. Suzdaleva Evženie, Nagy Ivan :  Practical Initialization of Recursive Mixture-Based Clustering for Non-negative Data , Informatics in Control, Automation and Robotics. ICINCO 2017., p. 679-698 , Eds: Gusikhin O., Madani K. [2020] Download DOI: 10.1007/978-3-030-11292-9_34
  4. Suzdaleva Evgenia, Nagy Ivan :  Mixture Initialization Based on Prior Data Visual Analysis , Intuitionistic Fuzziness and Other Intelligent Theories and Their Applications, p. 29-49 , Eds: Hadjiski M., Atanassov K. [2019] Download DOI: 10.1007/978-3-319-78931-6_3
  5. Nagy Ivan, Suzdaleva Evgenia :  Clustering Non-Gaussian Data Using Mixture Estimation with Uniform Components , Practical Issues of Intelligent Innovations. Studies in Systems, Decision and Control, p. 313-330 , Eds: Sgurev V., Jotsov V., Kacprzyk J. [2018] Download DOI: 10.1007/978-3-319-78437-3_14
  6. Nagy Ivan, Suzdaleva Evgenia :  Algorithms and Programs of Dynamic Mixture Estimation. Unified Approach to Different Types of Components, Springer, (Cham 2017) SpringerBriefs in Statistics [2017] Download DOI: 10.1007/978-3-319-64671-8
  7. Herda Z., Nedoma P., Plíhal Jiří :  The Design of Vehicle Speed Profile for Semi-autonomous Driving , Comprehensive Energy Management - Eco Routing & Velocity Profiles, p. 39-59 , Eds: Watzenig D., Brandstätter B. [2017] Download DOI: 10.1007/978-3-319-53165-6_3
  8. Grubmüller S., Plíhal Jiří, Nedoma P. :  Automated Driving from the View of Technical Standards , Automated driving, p. 29-40 , Eds: Plíhal Jiří, Nedoma Pavel, Grubmueller Stephanie [2017] Download DOI: 10.1007/978-3-319-31895-0
  9. Šucha M., Vlčková I., Černochová D., Zámečník P., Rehnová V., Plíhal Jiří :  Terminologický a výkladový slovník dopravní psychologie, česko-slovensko-anglicko-německý , Terminologický a výkladový slovník dopravní psychologie, česko-slovensko-anglicko-německý, p. 340-352 , Eds: Matúš Šucha, Vlčková Ivana, Černochová Dana, Zámečník Petr, Rehonová Vlasta [2016] Download DOI: 10.5507/ff.16.24451381
  10. Honzík Petr, Bartosinski Roman, Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora Jaroslav :  Video Processing: Foreground Recognition in the ASVP Platform , Smart Multicore Embedded Systems, p. 159-175 , Eds: Massimo T., Bertels K., Karlsson S., Pacull F. [2014] Download DOI: 10.1007/978-1-4614-8800-2_9
  11. Bartosinski Roman, Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora Jaroslav :  The Architecture and the Technology Characterization of an FPGA-Based Customizable Application-Specific Vector Coprocessor (ASVP) , Smart Multicore Embedded Systems, p. 45-77 , Eds: Massimo T., Bertels K., Karlsson S., Pacull F. [2014] Download DOI: 10.1007/978-1-4614-8800-2
  12. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora Jaroslav, Bartosinski Roman :  UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs, Springer, (New York 2013) Circuits & Systems [2013] DOI: 10.1007/978-1-4614-2410-9
  13. Gamrat Ch., Philippe J. M., Jesshope Ch., Shafarenko A., Bisdounis L., Bondi U., Ferrante A., Cabestany J., Hübner M., Pärsinnen J., Kadlec Jiří, Daněk Martin, Tain B., Eisenbach S., Auguin M., Diguet J. P., Lenormand E., Roux J. L. :  AETHER: Self-Adaptive Networked Entities: Autonomous Computing Elements for Future Pervasive Applications and Technologies , Reconfigurable Computing. From FPGAs to Hardware/Software Codesign, p. 149-184 , Eds: Cardoso Joao, Hübner Michael [2011] Download DOI: 10.1007/978-1-4614-0061-5
  14. Dulík T., Křivka Z., Kadlec Jiří, Bližňák M., Budíková V., Jirák O., Olšarová N., Trbušek J., Vašíček Z. :  Virtuální laboratoř pro vývoj aplikací s mikroprocesory a FPGA, CERM, (Brno 2011) [2011] Download
  15. Heřmánek Antonín :  Next generation equalisation algorithms, LAP LAMBERT Academic Publishing GmbH & Co, (Saarbrücken 2010) [2010] Download
  16. Hillerová E., Kadlec Jiří :  Czech Republic, Information Society Technology, ÚTIA AV ČR, (Praha 1999) [1999]

  1. Uglickich Evženie, Nagy Ivan :  Using Poisson proximity-based weights for traffic flow state prediction , Neural Network World vol.33, 4 (2023), p. 291-315 [2023] Download DOI: 10.14311/NNW.2023.33.017
  2. Likhonina Raissa, Uglickich Evženie :  Hand detection application based on QRD RLS Lattice algorithm and its implementation on Xilinx Zynq Ultrascale+ , Neural Network World vol.32, 2 (2022), p. 73-92 [2022] Download Download DOI: 10.14311/NNW.2022.32.005
  3. Jozová Šárka, Uglickich Evženie, Nagy Ivan, Likhonina Raissa :  Modeling of discrete questionnaire data with dimension reduction , Neural Network World vol.32, 1 (2022), p. 15-41 [2022] Download Download DOI: 10.14311/NNW.2022.32.002
  4. Plíhal Jiří, Nedoma P., Šesták V., Herda Z., Aksjonov A. :  Transport Automation in Urban Mobility: A Case Study of an Autonomous Parking System , MDPI vehicles vol.4, 2 (2022), p. 326-343 [2022] Download Download DOI: 10.3390/vehicles4020020
  5. Sau C., Rinaldi C., Pomante L., Palumbo F., Valente G., Fanni T., Martinez M., van der Linden F., Basten T., Geilen M., Peeren G., Kadlec Jiří, Pekka J., Bulej L., Barranco F., Saarinen J., Säntti T., Zedda M. K., Sanchez V., Nikkhah S. T., Goswami D., Amat G., Maršík L., van Helvoort M., Medina L., Al-Ars Z., de Beer A. :  Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project , Microprocessors and Microsystems vol.87, 104350 [2021] Download Download DOI: 10.1016/j.micpro.2021.104350
  6. Uglickich Evženie, Nagy Ivan, Vlčková D. :  Comparing clusterings using combination of the kappa statistic and entropy-based measure , Metron vol.77, 3 (2019), p. 253-270 [2019] Download Download DOI: 10.1007/s40300-019-00162-5
  7. Plíhal Jiří, Nedoma P., Franc Z. :  Celkový konceptuální datový model , Partner´s Contacts, 3 (2019), p. 70-80 [2019] Download Download
  8. Suzdaleva Evženie, Nagy Ivan :  Two-layer pointer model of driving style depending on the driving environment , Transportation Research. Part B: Methodological vol.128, 1 (2019), p. 254-270 [2019] Download Download DOI: 10.1016/j.trb.2019.08.009
  9. Hoozemans J., Van Straten J., Viitanen T., Tervo A., Kadlec Jiří, Al-Ars Z. :  ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA , Journal of Signal Processing Systems for Signal Image and Video Technology vol.91, 1 (2019), p. 61-73 [2019] Download Download DOI: 10.1007/s11265-018-1424-1
  10. Suzdaleva Evgenia, Nagy Ivan :  An online estimation of driving style using data-dependent pointer model , Transportation Research. Part C: Emerging Technologies vol.86, 1 (2018), p. 23-36 [2018] Download DOI: 10.1016/j.trc.2017.11.001
  11. Plíhal Jiří, Šucha M. :  SYSTÉMY ASISTOVANÉHO PARKOVÁNÍ , Partner´s Contacts vol.12, 1 (2017), p. 147-154 [2017] Download
  12. Plíhal Jiří, Šucha M. :  KOOPERATIVNÍ ADAPTIVNÍ SYSTÉMY PRO UDRŽOVÁNÍ RYCHLOSTI JÍZDY VOZIDLA , Partner´s Contacts, 3 (2016), p. 156-163 [2016] Download
  13. Coufalová V., Zsapková Haringová D., Kadlec Jiří :  Účast České republiky ve společných technologických iniciativách ARTEMIS, ENIAC a ECSEL , Echo vol.2016, p. 12-14 [2016] Download
  14. Nagy Ivan, Suzdaleva Evgenia :  On-line mixture-based alternative to logistic regression , Neural Network World vol.26, 5 (2016), p. 417-437 [2016] Download DOI: 10.14311/NNW.2016.26.024
  15. Plíhal Jiří, Nedoma P. :  POLO-AUTONOMNÍ A AUTONOMNÍ VOZIDLOVÉ SYSTÉMY Z POHLEDU TECHNICKÝCH NOREM , Silniční obzor vol.2016, 6 (2016), p. 161-164 [2016] Download
  16. Plíhal Jiří, Šucha M. :  INTELIGENTNÍ VOZIDLOVÉ SYSTÉMY – SYSTÉMY PRO , Partner´s Contacts, 3 (2015), p. 118-125 [2015] Download
  17. Kadlec Jiří, Sebroňová E. :  Účast ČR v projektech programu ICT HORIZONT 2020 v porovnání se zeměmi EU-13 , Echo vol.2015, p. 11-15 [2015] Download
  18. Plíhal Jiří, Šucha M. :  Varovné systémy řidiče , DOPRAVNÍ INŽENÝRSTVÍ vol.2014, 1 (2014), p. 29-32 [2014] Download
  19. Kadlec Jiří, Sebroňová E. :  Zhodnocení účasti ČR v projektech priority ICT 7. RP v porovnání se zeměmi EU-12 , Echo, 3 (2014), p. 9-12 [2014] Download
  20. Matulík Radim :  Používání čidel pohybu k automatickému zapínání osvětlení , Elektro vol.23, 11 (2013), p. 30-31 [2013] Download
  21. Kadlec Jiří, Nedvědová K. :  Artemis JU and Eniac JU Projects with Czech Participation , Automa, p. 6-9 [2013] Download
  22. Kadlec Jiří :  Czech Companies Involved in the ARTEMIS Programme , Automa, p. 4-5 [2013] Download
  23. Kadlec Jiří :  Elektronika pro zvýšení bezpečnosti malých městských automobilů , Elektro vol.2013, p. 21-21 [2013] Download
  24. Kadlec Jiří :  Elektronika pro zvýšení bezpečnosti malých městských automobilů , Automa vol.19, 2 (2013), p. 54-55 [2013] Download
  25. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora Jaroslav :  Hardware Support for Fine-Grain Multi-Threading in LEON3 , Carpathian Journal of Electronic and Computer Engineering vol.4, 1 (2011), p. 27-34 [2011] Download
  26. Kadlec Jiří, Bystřická J. :  Výsledky třetí výzvy programu společných technologických iniciativ ARTEMIS JU a ENIAC JU , Echo vol.2011, 2 (2011), p. 18-19 [2011] Download
  27. Kadlec Jiří :  Účast ČR v programu informačních a komunikačních technologií (ICT) v 7. RP , Echo, p. 6-8, 15 [2010] Download
  28. Tichý Milan, Schier Jan, Gregg D. :  GSFAP Adaptive Filtering Using Log Arithmetic for Resource-Constrained Embedded Systems , ACM Transactions on Embedded Computing Systems vol.9, 3 (2010), p. 1-31 [2010] Download DOI: 10.1145/1698772.1698787
  29. Pohl Zdeněk, Tichý Milan, Kadlec Jiří :  Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA , EURASIP Journal on Advances in Signal Processing vol.2008, 2008 (2008), p. 1-11 [2008] Download DOI: 10.1155/2008/394201
  30. Coleman J. N., Softley C. I., Kadlec Jiří, Matoušek R., Tichý Milan, Pohl Zdeněk, Heřmánek Antonín, Benschop N. F. :  The European Logarithmic Microprocessor , IEEE Transactions on Computers vol.57, 4 (2008), p. 532-546 [2008] Download
  31. Kadlec Jiří, Vaculíková E. :  ARTEMIS - šance pro výzkum v oboru vestavných systémů - polemika , Automa vol.13, 10 (2007), p. 13-15 [2007]
  32. Šůcha P., Hanzálek Z., Heřmánek Antonín, Schier Jan :  Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design—Implementation of Finite Interval Constant Modulus Algorithm , Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology vol.46, 1 (2007), p. 35-53 [2007] Download
  33. Kadlec Jiří, Vaculíková E. :  Podpora projektů informační a komunikační techniky v 7.rámcovém programu EU pro výzkum , Automa vol.13, 5 (2006), p. 82-83 [2006]
  34. Matoušek Rudolf, Daněk Martin, Kubátová H. :  Perspektivy dynamické rekonfigurace programovatelných polí FPGA , Sdělovací technika vol.54, 4 (2006), p. 3-6 [2006]
  35. Daněk Martin :  Programovatelná hradlová pole - FPGA , Automa vol.12, 2 (2006), p. 9-13 [2006]
  36. Kadlec Jiří, Chappel S. :  Implementing floating-point DSP , Embedded Magazine vol.2, 3 (2006), p. 12-14 [2006] Download
  37. Daněk Martin, Honzík Petr, Kadlec Jiří, Pohl Zdeněk, Matoušek Rudolf :  Platforma s částečnou dynamickou rekonfigurací FPGA , Automa vol.12, 5 (2006), p. 40-43 [2006]
  38. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Bartosinski Roman, Honzík Petr :  Reconfigurable System-on-a-Chip , Syndicated vol.5, 2 (2005), p. 1-3 [2005]
  39. Kadlec Jiří, Albrecht V. :  Význam účasti v projektech EU , Echo vol.2, 2 (2005), p. 11-13 [2005]
  40. Honzík Petr :  Programování AVR v aplikaci , Praktická elektronika A Radio vol.10, 4 (2005), p. 20 [2005]
  41. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  Reconfigurable system on programmable chip platform , ATMEL Applications Journal, p. 9-12 [2005]
  42. Kadlec Jiří :  IDEALIST: Jak najít partnery pro projekty IST , Echo, p. 13 [2004]
  43. Mazanec Tomáš, Brothánek M. :  FPGA implementace LMS a N-LMS algoritmu pro potlačení akustického echa , Akustické listy vol.10, 4 (2004), p. 9-13 [2004]
  44. Honzík Petr :  Elektronická kniha jízd , Elektus -- "Speciál" : ročenka časopisu Praktická elektronika A Radio, p. 34-38 [2004]
  45. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Tichý Milan :  Lattice for FPGAs using logarithmic arithmetic , Electronic Engineering vol.74, 906 (2002), p. 53-56 [2002]
  46. Hlavička J., Kadlec Jiří :  Vstup do evropské informační společnosti - program IST , Automa vol.6, 7 (2000), p. 105-107 [2000]
  47. Kadlec Jiří :  Konkrétní příležitost pro firmy z ČR: Projekty take-up programu IST s termínem podání 31.10.2000 , Automa vol.6, 7 (2000), p. 104 [2000]
  48. Coleman J. N., Chester E. I., Softley C. I., Kadlec Jiří :  Arithmetic on the European Logarithmic Microprocessor , IEEE Transactions on Computers vol.49, 7 (2000), p. 702-715 [2000]
  49. Kadlec Jiří, Schier Jan :  Analysis of a normalized QR filter using Bayesian description of propagated data , International Journal of Adaptive Control and Signal Processing vol.13, 6 (1999), p. 487-505 [1999]
  50. Matulík Radim :  GIN - zápisník pro nevidomé , Computer World vol.8, 10 (1997), p. 45 [1997]
  51. Matulík Radim :  Notebook for the blind , ERCIM News, p. 19 [1997]
  52. Kadlec Jiří, Gaston F. M. F., Irwin G. W. :  A parallel fixed-point predictive controller , International Journal of Adaptive Control and Signal Processing vol.11, 5 (1997), p. 415-430 [1997] Download
  53. Schier Jan :  Estimation of transport delay using parallel recursive modified Gram-Schmidt algorithm , International Journal of Adaptive Control and Signal Processing vol.11, 5 (1997), p. 431-442 [1997] Download
  54. Schier Jan :  Inverse updated systolic RLS algorithm with regularized exponential forgetting , Kybernetika vol.32, 3 (1996), p. 209-234 [1996] Download
  55. Kadlec Jiří :  Transputer implementation of block regularized filtering , Kybernetika vol.32, 3 (1996), p. 235-250 [1996]
  56. Schier Jan :  A systolic algorithm for block-regularized RLS identification , Integration, the VLSI Journal vol.20, p. 85-100 [1995] Download
  57. Kadlec Jiří, Gaston F. M. F., Irwin G. W. :  The block regularised parameter estimator and its parallelisation , Automatica vol.31, 8 (1995), p. 1125-1136 [1995] Download

  1. Pérez Iván, Vomlel Jiří :  On Identifiability of BN2A Networks , Symbolic and Quantitative Approaches to Reasoning with Uncertainty. ECSQARU 2023., p. 136-148 , Eds: Bouraoui Zied, Vesic Srdjan, European Conference, ECSQARU 2023 /17./, (Arras, FR, 20230919) [2023] Download DOI: 10.1007/978-3-031-45608-4_11
  2. Uglickich Evženie, Nagy Ivan, Reznychenko T. :  Count Predictive Model with Mixed Categorical and Count Explanatory Variables , Proceedings of the The 12th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS) IDAACS'2023, p. 51-56, The 12th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS) IDAACS'2023, (Dortmund, DE, 20230907) [2023] Download
  3. Reznychenko T., Uglickich Evženie, Nagy Ivan :  Conditional histogram analysis of discrete questionnaire data , 2023 Smart City Symposium Prague (SCSP), p. 1-6, Smart City Symposium Prague 2023 (SCSP 2023), (Prague, CZ, 20230525) [2023] Download DOI: 10.1109/SCSP58044.2023.10146233
  4. Likhonina Raissa, Kadlec Jiří, Uglickich Evženie :  Hand detection ultrasound based application implemented on the FPGA platform , Book of abstracts. 6th International Caparica Conference on Ultrasonic-based applications from analysis to synthesis, p. 107-107, Ultrasonics 2023, (Caparica, PT, 20230626) [2023]
  5. Likhonina Raissa :  Fast Bayesian Algorithms for FPGA Platforms, DATE'23 (Design, Automation and Test in Europe Conference), (Antwerp, BE, 20230417) [2023] Download
  6. Kohout Lukáš, Pohl Zdeněk, Kadlec Jiří :  Xilinx Vitis AI facedetect and resnet50 Demo on Trenz Electronic TE0802 02 with ZU2CG and 1 GB LPDD4, ( 2023) [2023] Download
  7. Kohout Lukáš, Pohl Zdeněk, Kadlec Jiří :  Xilinx Vitis AI facedetect Demo on Trenz Electronic TE0820 4EV SoM with TE0701 06 Carrier Board and Avnet HDMI In/Out FMC Card, ( 2023) [2023] Download
  8. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  Xilinx Vitis AI 'facedetect' Demo on Trenz Electronic board TE0808 SoM + TEBF0808 Carrier, ( 2022) [2022] Download
  9. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  All VART Examples from Xilinx Vitis AI 2.0 for Trenz Electronic board TE0808 SoM + TEBF0808 Carrier, ( 2022) [2022] Download
  10. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  Testing all Samples from Xilinx Vitis AI Library 2.0 on Trenz Electronic board TE0808 SoM + TEBF0808 Carrier, ( 2022) [2022] Download
  11. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  Xilinx Vitis AI ‘facedetect’ and ‘resnet50’ Demo on Trenz Electronic TE0821-01-2cg-4GB SoM + TE0706-3 Carrier, ( 2022) [2022] Download
  12. Likhonina Raissa :  Rychlé algoritmy Bayesovského rozhodování pro FPGA platformy, České vysoké učení technické v Praze, (Prague 2022) [2022] Download
  13. Kohout Lukáš :  Smart Oscilloscope Based on TEBF0808 and TE0808-04-6EB21A SoM with Analog Devices AD-FMCDAQ2-EBZ FMC Card., ( 2022) [2022] Download
  14. Uglickich Evženie, Nagy Ivan :  Recursive mixture estimation with univariate multimodal Poisson variable, UTIA AV ČR, v. v. i.,, (Prague 2022) Research Report 2394 [2022] Download
  15. Nedoma P., Herda Z., Plíhal Jiří :  Research Report Influence of Vehicle Assistant System on Track keeping, ŠKODA AUTO, (Mladá Boleslav 2021) [2021] Download
  16. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš, Likhonina Raissa :  STM32H753 Terminal with Zynq Ultrascale+ Accelerator, ( 2021) [2021] Download
  17. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš, Likhonina Raissa :  STM32H753 Terminal with TE0723 03 07S 1C Accelerator HW Data Movers, ( 2021) [2021] Download
  18. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš, Likhonina Raissa :  Data Movers in DTRiMC tool for TE0726 03M 07S board, ( 2021) [2021] Download
  19. Jozová Šárka, Uglickich Evženie, Nagy Ivan :  Bayesian Mixture Estimation without Tears , Proceedings of the 18th International Conference on Informatics in Control, Automation and Robotics, p. 641-648 , Eds: Gusikhin O., Nijmeijer H., Madani K., International Conference on Informatics in Control, Automation and Robotics 2021 /18./, (Setúbal (online), PT, 20210706) [2021] Download DOI: 10.5220/0010508706410648
  20. Uglickich Evženie, Nagy Ivan, Petrouš Matej :  Prediction of Multimodal Poisson Variable using Discretization of Gaussian Data , Proceedings of the 18th International Conference on Informatics in Control, Automation and Robotics, p. 600-608 , Eds: Gusikhin O., Nijmeijer H., Madani K., International Conference on Informatics in Control, Automation and Robotics 2021 /18./, (Setúbal (online), PT, 20210706) [2021] Download DOI: 10.5220/0010575006000608
  21. Kadlec Jiří :  Eight FP03x8 accelerators for TE0808-09-EG-ES1 module on TEBF0808 carrier board, ( 2021) [2021] Download
  22. Kohout Lukáš :  Arrowhead 4.1.3 Client on Trenz TEBF0808 + TE0808 04 6EB21A SoM Running Petalinux 2018.2 Kernel with Debian Buster File System, ( 2021) [2021] Download
  23. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  DTRiMC tool for TE0820-03-4EV-1E module on TE0701-06 carrier board, ( 2021) [2021] Download
  24. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  DTRiMC tool for TE0820-02-3CG-1E module on TE0701-06 carrier board, ( 2021) [2021] Download
  25. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  DTRiMC tool for TE0808-15-EG-1EE module on TEBF0808 carrier board, ( 2021) [2021] Download
  26. Kadlec Jiří, Likhonina Raissa :  DTRiMC tool for TE0726-03M board, ( 2021) [2021] Download
  27. Kadlec Jiří, Likhonina Raissa :  DTRiMC tool for TE0808-09-EG-ES1 module on TEBF0808 carrier board, ( 2021) [2021] Download
  28. Kohout Lukáš :  Trenz TEBF0808 + TE0808-04-6EB21A SoM Running Petalinux 2018.2 Kernel with Debian Buster File System, ( 2021) [2021] Download
  29. Kohout Lukáš :  Trenz TEBF0808 + TE0808-04-6EB21A SoMI2C Communication with NUCLEOSTM32H753, ( 2021) [2021] Download
  30. Pomante L., Palumbo F., Rinaldi C., Valente G., Sau C., Fanni T., Linden F., Basten T., Geilen M., Peeren G., Kadlec Jiří, Jääskeläinen P., Martinez M., Saarinen J., Säntti T., Zedda M., Sanchez V., Goswami D., Al-Ars Z., Beer A. :  Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project , Proceedings - Euromicro Conference on Digital System Design, DSD 2020, p. 378-385 , Eds: Trost A., Zemva A., Skavhaug A., Euromicro Conference on Digital System Design, DSD 2020 /23./, (Kranj, SI, 20200826) [2020] Download DOI: 10.1109/DSD51259.2020.00067
  31. Kohout Lukáš :  Arrowhead Core System on Ubuntu 18.04, ( 2020) [2020] Download
  32. Likhonina Raissa :  Hand detection algorithm: pre-processing stage , Proceedings of the 17th international conference on informatics in control, automation and robotics, p. 695-701 , Eds: Gusikhin Oleg, Madani Kurosh, Zaytoon Janan, ICINCO 2020 (17th international conference on informatics in control, automation and robotics), (online conference, FR, 20200707) [2020] Download DOI: 10.5220/0009885206950701
  33. Plíhal Jiří, Nedoma P., Šesták V. :  Jednotka pro testování termo-energetických průběhů v prostředí řidič-vozidlo, ( 2020) [2020] Download
  34. Petrouš Matej, Uglickich Evženie :  Rayleigh model fitting to nonnegative discrete data , Proceedings of 2020 IEEE 24th International Conference on Intelligent Engineering Systems (INES), p. 67-72, IEEE International Conference on Intelligent Engineering Systems 2020 (INES 2020) /24./, (Reykjavík, IS, 20200708) [2020] Download DOI: 10.1109/INES49302.2020.9147173
  35. Petrouš Matej, Uglickich Evženie :  Modeling of mixed data for Poisson prediction , Applied Computational Intelligence and Informatics (SACI) : 2020 IEEE 14th International Symposium on Applied Computational Intelligence and Informatics (SACI), p. 77-82, IEEE 14th International Symposium on Applied Computational Intelligence and Informatics SACI 2020, (Timisoara, RO, 20200521) [2020] Download DOI: 10.1109/SACI49304.2020.9118836
  36. Kohout Lukáš, Kadlec Jiří :  Trenz TEBF0808 + TE0808 04 6EB21A SoM with Analog Devices AD FMCDAQ2 EBZ Evaluation Board, ( 2019) [2019] Download
  37. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Evaluation version of 8xSIMD FP01x8 accelerator for ArduZynq shield, ( 2019) [2019] Download
  38. Kadlec Jiří, Kohout Lukáš :  Industrial 40 nm Demonstrator NUCLEO STM32H755ZI-Q, ( 2019) [2019] Download
  39. Kadlec Jiří, Kohout Lukáš :  Benchmarks for STM32H7 MCUs, ( 2019) [2019] Download
  40. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  FP01x8 Accelerator on TE0726-03M, ( 2019) [2019] Download
  41. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Two serial connected evaluation versions of FP03x8 accelerators for TE0820-03-4EV-1E module on TE0701-06 carrier board., ( 2019) [2019] Download
  42. Pohl Zdeněk, Kohout Lukáš :  UTIA Evaluation Board v1.7 v1.8 Beamforming Demo, ( 2019) [2019] Download
  43. Pohl Zdeněk, Kohout Lukáš :  UTIA evBoard v1.0 Beamforming Demo, ( 2019) [2019] Download
  44. Kohout Lukáš :  STM32 Nucleo-H743ZI with Adafruit 1.8” TFT Shield V2, ( 2019) [2019] Download
  45. Kohout Lukáš, Kadlec Jiří, Pohl Zdeněk :  Video Input/Output IP Cores for Xilinx ZCU102 with Avnet HDMI Input/Output FMC Module, ( 2019) [2019] Download
  46. Kohout Lukáš, Kadlec Jiří, Pohl Zdeněk :  Video Input/Output IP Cores for TE0820 SoM with TE0701 Carrier and and Avnet HDMI Input/Output FMC Module, ( 2019) [2019] Download
  47. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Design Time and Run Time Resources for Zynq Ultrascale+ TE0820-03-4EV-1E with SDSoC 2018.2 Support, ( 2019) [2019] Download
  48. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Design Time and Run Time Resources for Zynq Ultrascale+ TE0808-04-15EG-1EE with SDSoC 2018.2 Support, ( 2019) [2019] Download
  49. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Design Time and Run Time Resources for the ZynqBerry Board TE0726-03M with SDSoC 2018.2 Support, ( 2019) [2019] Download
  50. Petrouš Matej, Suzdaleva Evženie, Nagy Ivan :  Modeling of passenger demand using mixture of Poisson components , Proceedings of the 16th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2019), p. 617-624 , Eds: Gusikhin Oleg, Madani Kurosh, Zaytoon Janan, International Conference on Informatics in Control, Automation and Robotics (ICINCO 2019) /16./, (Prague, CZ, 20190729) [2019] Download
  51. Zaid A., Basten T., Beer A., Geilen M., Goswami D., Jääskeläinen P., Kadlec Jiří, Alejandro M., Palumbo F., Peeren G., Pomante L., Linden F., Saarinen J., Säntti T., Sau C., Zedda M. :  The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems , Proceedings of the 16th ACM International Conference on Computing Frontiers, p. 333-338 , Eds: Palumbo F., Becchi M., Schulz M., Sato K., ACM International Conference on Computing Frontiers 2019, (Alghero, IT, 20190430) [2019] Download DOI: 10.1145/3310273.3323437
  52. Likhonina Raissa :  Hand Gesture Recognition Based on Ultrasound Technology: Pre-processing Stage , Proceedings - Research monograph : 2019 8th Mediterranean Conference on Embedded Computing (MECO), p. 354-360 , Eds: Stojanović Radovan, Jóźwiak Lech, Jurišić Dražen, Lutovac Budimir, Mediterranean Conference on Embedded Computing - MECO'2019 /8./, (Budva, ME, 20190610) [2019] Download DOI: 10.1109/MECO.2019.8760063
  53. Likhonina Raissa :  QRD RLS Algorithm for Hand Gesture Recognition Applications , Proceedings of IWSSIP 2019, p. 195-201 , Eds: Žagar Drago, Rimac-Drlje Snježana, Martinović Goran, Galić Irena, Vranješ Denis, Habijan Marija, International Conference on Systems, Signals and Image Processing 2019 (IWSSIP 2019), (Osijek, HR, 20190605) [2019] Download DOI: 10.1109/IWSSIP.2019.8787283
  54. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Arrowhead Compatible Zynq Ultrascale+ Systems with Xilinx SDSoC 2018.2 Support, ( 2019) [2019] Download
  55. Kadlec Jiří, Kohout Lukáš :  Arrowhead client on Zynq 7000 device with support for the Xilinx SDSoC 2018.2 HW accelerators, ( 2019) [2019] Download
  56. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Arrowhead Compatible Zynq with SDSoC 2017.4 and Floating-Point 8xSIMD EdkDSP Accelerators, ( 2019) [2019] Download
  57. Pohl Zdeněk :  SILENSE TE0706+TE0720 Ultrasound Capture Platform with Example Application, ( 2019) [2019] Download
  58. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  Live Canny Edge Detection, ( 2018) [2018] Download
  59. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  Stereo Demo, ( 2018) [2018] Download
  60. Likhonina Raissa, Kadlec Jiří :  Noise Cancellation Using QRD RLS Algorithms, ( 2018) [2018] Download
  61. Kohout Lukáš :  Simple Gesture Detector Based on TE0706 withTE0720-2IFand Ultrasonic Range FinderPmodMAXSONAR, ( 2018) [2018] Download
  62. Nedoma P., Herda Z., Franc Z., Plíhal Jiří :  Validation of comprehensive energy management system based on cloud-sourced information, ŠKODA AUTO a.s., (Mladá Boleslav 2018) [2018] Download
  63. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Compact Zynq System 2017.4 with SW-defined Floating-Point 8xSIMD EdkDSP Accelerator, ( 2018) [2018] Download
  64. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Compact Zynq System with SW-defined Floating-Point 8xSIMD EdkDSP Accelerator, ( 2018) [2018] Download
  65. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  SW Defined Floating Point 8xSIMD EdkDSP IP Serving for Adaptive Noise Cancellation, ( 2018) [2018] Download
  66. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Video Processing Demonstrator with Full HD Sensor and 8xSIMD EdkDSP Accelerator IP Core, ( 2018) [2018] Download
  67. Nagy Ivan, Suzdaleva Evženie, Pecherková Pavla :  Clustering and Classification Using Recursive Mixture Estimation. Software package, ( 2018) [2018] Download Download
  68. Kohout Lukáš :  Remote Terminal for Dense Optical Flow Demonstrator Using Python 1300 Camera Module, ( 2017) [2017] Download
  69. Likhonina Raissa, Kohout Lukáš, Kadlec Jiří :  Camera-to-touchscreen design , Proceedings of 6th International Workshop on Mathematical Models and their Applications (IWMMA’2017), p. 94-99, 6th International Workshop on Mathematical Models and their Applications (IWMMA’2017), (Krasnojarsk, RU, 20171113) [2017] Download
  70. Suzdaleva Evgenia, Nagy Ivan, Petrouš Matej :  Recursive Clustering Hematological Data Using Mixture of Exponential Components , Proceedings of International Conference on Intelligent Informatics and BioMedical Sciences ICIIBMS 2017, p. 63-70, International Conference on Intelligent Informatics and BioMedical Sciences ICIIBMS 2017, (Okinawa, JP, 20171124) [2017] Download DOI: 10.1109/ICIIBMS.2017.8279700
  71. Kadlec Jiří, Likhonina Raissa :  Adaptive RLS Algorithms Reference Implementations, ( 2017) [2017] Download
  72. Kohout Lukáš :  Remote Terminal for Python 1300 Camera Module, ( 2017) [2017] Download
  73. Isakovic H., Grosu R., Ratasich D., Kadlec Jiří, Pohl Zdeněk, Kerrison S. :  A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC2 , Computer Safety, Reliability, and Security : SAFECOMP 2017 Workshops, ASSURE, DECSoS, SASSUR, TELERISE, and TIPS, p. 127-140 , Eds: Tonetta Stefano, Schoitsch Erwin, Bitsch Friedemann, SAFECOMP 2017 International Conference on Computer Safety, Reliability, and Security, (Trento, IT, 20170912) [2017] Download DOI: 10.1007/978-3-319-66284-8
  74. Nagy Ivan, Suzdaleva Evgenia, Petrouš Matej :  Clustering with a Model of Sub-Mixtures of Different Distributions , Proceedings of IEEE 15th International Symposium on Intelligent Systems and Informatics SISY 2017, p. 315-320, IEEE 15th International Symposium on Intelligent Systems and Informatics (SISY 2017), (Subotica, RS, 20170914) [2017] Download DOI: 10.1109/SISY.2017.8080574
  75. Pecherková Pavla, Nagy Ivan :  Analysis of discrete data from traffic accidents , 2017 Smart City Symposium Prague (SCSP), 7973843 , 2017 Smart City Symposium Prague (SCSP), (Prague, CZ, 20170525) [2017] Download DOI: 10.1109/SCSP.2017.7973843
  76. Suzdaleva Evgenia, Nagy Ivan, Pecherková Pavla, Likhonina Raissa :  Initialization of Recursive Mixture-based Clustering with Uniform Components , Proceedings of the 14th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2017), p. 449-458, The 14th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2017), (Madrid, ES, 20170726) [2017] Download DOI: 10.5220/0006417104490458
  77. Plíhal Jiří :  Dynamické označování polohy pro geografické databáze , Geoinformatika v pohybu, GIS Ostrava 2017, (Ostrava, CZ, 20170322) [2017] Download
  78. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-30-1 SoM on TE0701-06 Carrier, ( 2017) [2017] Download
  79. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-04-30-3E SoM on TE0701-06 Carrier, ( 2017) [2017] Download
  80. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD Video Processing in HW with three EdkDSP 8xSIMD Accelerators for TE0715-30-1 SoM on EMC2-DP-V2 Carrier, ( 2017) [2017] Download
  81. Pecherková Pavla, Nagy Ivan :  Logistic Regression with Expert Intervention , SCSP 2016. Smart Cities Symposium Prague, p. 1-5, SCSP 2016. Smart Cities Symposium, (Prague, CZ, 20160526) [2016] Download DOI: 10.1109/SCSP.2016.7501032
  82. Plíhal Jiří, Machan J., Nedoma P., Kudrna J. :  Funkční vzorek jednotky pro analýzu protismykových charakteristik pozemní komunikace včetně návrhu rozhraní HMI, ( 2016) [2016]
  83. Pohl Zdeněk :  APCP Image Processing Demos, ( 2016) [2016] Download
  84. Kudrna J., Plíhal Jiří, Nedoma P., Herda Z., Kozák P. :  VÝVOJ ADAPTIVNÍHO INTERAKTIVNÍHO SYSTÉMU PRO ZVÝŠENÍ BEZPEČNOSTI OSÁDKY VOZIDEL A JEHO VYUŽITÍ PRO HODNOCENÍ POVRCHOVÝCH VLASTNOSTÍ VOZOVEK , Zvýšení bezpečnosti provozu vozidel ozbrojených sil, p. 47-54 , Eds: .Omelka Jaroslav , Zvýšení bezpečnosti provozu vozidel ozbrojených sil, (Vyškov, CZ, 01.11.2016 - 02.11.2016) [2016] Download
  85. Zsapková Haringová D., Kadlec Jiří :  Informační den: Informační a komunikační technologie v programu Horizont 2020, (Praha, CZ, 20160922) [2016] Download
  86. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Asymmetric Multiprocessing with MicroBlaze, EdkDSP Accelerator and Toshiba Sensor Video for Automotive grade Zynq on TE0720-03-1QF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  87. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Asymmetric Multiprocessing with MicroBlaze, EdkDSP Accelerator and Toshiba Sensor Video Processing for low cost Zynq on TE0720-03-1CF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  88. Kohout Lukáš, Pohl Zdeněk, Kadlec Jiří :  EMC2-DP HDMI in HDMI out Platform, ( 2016) [2016] Download
  89. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD HDMI In-Out HW-Accelerated Demos for Zynq System-on-Module TE0715-03-30-1I and Sundance EMC2-DP-V2 Platform, ( 2016) [2016] Download
  90. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out SW and HW Demos for Automotive Zynq TE0720-03-1QF Module or Commercial Zynq TE0720-03-1CF Module on TE0701-05 Carrier Board, ( 2016) [2016] Download
  91. Suzdaleva Evgenia, Nagy Ivan, Mlynářová Tereza :  Expert-based Initialization of Recursive Mixture Estimation , Proceedings of 2016 IEEE 8th International Conference on Intelligent Systems, p. 308-315, 2016 IEEE 8th International Conference on Intelligent Systems IS'2016, (Sofia, BG, 04.09.2016-06.09.2016) [2016] Download DOI: 10.1109/IS.2016.7737439
  92. Nagy Ivan, Suzdaleva Evgenia, Mlynářová Tereza :  Mixture-based Clustering Non-gaussian Data with Fixed Bounds , Proceedings of 2016 IEEE 8th International Conference on Intelligent Systems, p. 265-271, 2016 IEEE 8th International Conference on Intelligent Systems IS'2016, (Sofia, BG, 04.09.2016-06.09.2016) [2016] Download DOI: 10.1109/IS.2016.7737431
  93. Likhonina Raissa, Suzdaleva Evgenia, Nagy Ivan :  Comparison of mixture-based classification with the data-dependent pointer model for various types of components, ÚTIA AV ČR, (Praha 2016) Research Report 2355 [2016] Download
  94. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out SW and HW Demos for Zynq System-on-Module TE0720-03-2IF and TE0701-05 Carrier Board, ( 2016) [2016] Download
  95. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  SDSoC 2015.4 Standalone BSP with Full HD HDMI In-Out with SW and HW Demos for Zynq System-on-Module TE0715-03-30 and Sundance EMC2-DP-V2 Platform, ( 2016) [2016] Download
  96. Pohl Zdeněk, Kohout Lukáš, Kadlec Jiří :  ALMARVI Python Camera Platform, ( 2016) [2016] Download
  97. Nagy Ivan, Suzdaleva Evgenia, Pecherková Pavla :  Comparison of Various Definitions of Proximity in Mixture Estimation , Proceedings of the 13th International Conference on Informatics in Control, Automation and Robotics (ICINCO 2016), p. 527-534, International Conference on Informatics in Control, Automation and Robotics /13./ (ICINCO 2016), (Lisbon, PT, 20160729) [2016] Download DOI: 10.5220/0005982805270534
  98. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Python 1300 Sensor Video Processing in HW with EdkDSP 8xSIMD Accelerator for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  99. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD HDMI In-Out HW-Accelerated Demos for Zynq System-on-Module TE0720-03-2IF and TE0701-05 Carrier Board, ( 2016) [2016] Download
  100. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Zynq Platform with UTIA EdkDSP Accelerator and Toshiba Sensor Video Processing in HW for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  101. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Full HD Toshiba Video Sensor Platform with Automotive Grade Arm Zynq on TE0720-03-1QF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  102. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Toshiba Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  103. Kadlec Jiří, Pohl Zdeněk, Kohout Lukáš :  Python 1300 Video Sensor Evaluation Platform for TE0720-03-2IF SoM on TE0701-05 Carrier, ( 2016) [2016] Download
  104. Likhonina Raissa, Kohout Lukáš, Kadlec Jiří :  Camera to Touchscreen Demonstration for MicroZed 7020 carrier board, Avnet 7-inch Zed Touch Display and Avnet Toshiba Industrial 1080P60 Camera Module, ( 2016) [2016] Download
  105. Kohout Lukáš :  eMMC AXIS Controller Interfacing MTFC32GJWDQ-4M 32 GB Memory on Xilinx KC705 Board, ( 2015) [2015] Download
  106. Kohout Lukáš :  eMMC AXIS Controller Interfacing MTFC32GJWDQ-4M 32 GB Memory on Xilinx ZC702 Board, ( 2015) [2015] Download
  107. Kadlec Jiří :  EdkDSP Accelerator IP Evaluation in Vivado 2014.4 Artix7 AC701 board, ( 2015) [2015] Download
  108. Kadlec Jiří, Pohl Zdeněk :  Evaluation of Asymmetric Multiprocessing for Zynq System-on-Modules TE0720-02-2IF, TE0720-02-1CF, TE0720-02-1QF with Carrier Board TE0701-05, ( 2015) [2015] Download
  109. Nagy Ivan, Suzdaleva Evgenia, Mlynářová Tereza :  Mixture Multi-Step-Ahead Prediction , Proceedings of the 16th conference of the Applied Stochastic Models and Data Analysis (ASMDA) International Society, p. 727-738, The 16th conference of the Applied Stochastic Models and Data Analysis (ASMDA) International Society, (Piraeus, GR, 30.06.2015-4.07.2015) [2015] Download
  110. Kadlec Jiří, Zsapková Haringová D. :  Information and communication technologies in Horizon 2020, (Praha, CZ, 02.10.2015) [2015] Download
  111. Kadlec Jiří :  Video Chain Demonstrator on Xilinx Kintex7 FPGA with EdkDSP Floating Point Accelerators , Proceedings 2015 International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV) , Eds: Soudris Dimitrios, Carro Luigi, International Conference on Embedded Computer Systems: Architectures, Modelling and Simulation (SAMOS XV), (Agios Konstantinos, Samos, GR, 20.07.2015-23.07.2015) [2015] DOI: 10.1109/SAMOS.2015.7363690
  112. Suzdaleva Evgenia, Nagy Ivan, Mlynářová Tereza :  Recursive Estimation of Mixtures of Exponential and Normal Distributions , Proceedings of the 2015 IEEE 8th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS), p. 137-142, International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications /8./ (IDAACS'2015), (Warsaw, PL, 24.09.2015-26.09.2015) [2015] Download DOI: 10.1109/IDAACS.2015.7340715
  113. Machan J., Nedoma P., Plíhal Jiří, Kudrna J. :  Jednotka pro interpolaci signálu GNSS poradního vozidlového systému, ( 2015) [2015] Download
  114. Kohout Lukáš, Kadlec Jiří, Pohl Zdeněk :  Video Input/Output Demonstration for Trenz TE0701-05, TE0720-02-1CF, TE0720-02-1QF, TE0720-02-2IF and Avnet HDMI Input/Output FMC Module, ( 2015) [2015] Download
  115. Pohl Zdeněk :  3D Anaglyph Demo, ( 2015) [2015] Download
  116. Pohl Zdeněk :  Dynamic Programmable Logic Reconfiguration for Zynq, ( 2015) [2015] Download
  117. Kadlec Jiří, Zsapková Haringová D., Sebroňová E. :  Informační a komunikační technologie v programu Horizont 2020, (Praha, CZ, 06.02.2015-06.02.2015) [2015] Download
  118. Kadlec Jiří :  Computation and Communication Blocks for Xilinx Kintex7 FPGA with UTIA EdkDSP Accelerators. Vivado 2013.4 Designs with SW Demos, ( 2014) [2014] Download
  119. Kadlec Jiří :  UTIA EdkDSP Demonstrator in Xilinx 3S700AN FPGA with Embedded FLASH and NV RAM, ( 2014) [2014] Download
  120. Kohout Lukáš, Matulík Radim :  Interfacing e.MMC 32 GB Memory MTFC32GJWDQ-4M with Xilinx ZC702 FPGA Board, ( 2014) [2014] Download
  121. Kadlec Jiří, Pohl Zdeněk :  Asymmetric Multiprocessing on ZYNQ ZC702 board with EdkDSP Accelerators for Xilinx Vivado 2013.4 Design Flow, ( 2014) [2014] Download
  122. Kadlec Jiří :  Internet of Things Building Blocks for Xilinx Artix7 FPGA with UTIA EdkDSP Accelerators. Vivado 2013.4 Designs with SW Demos, ( 2014) [2014] Download
  123. Kadlec Jiří :  Asymmetric Multiprocessing (AMP) on ZYNQ with EdkDSP Accelerators on Xilinx ZC702 Board - ISE 14.5, ( 2014) [2014] Download
  124. Kadlec Jiří :  UTIA EdkDSP Platform Demonstrator on Xilinx SP605 Board – PLB Bus, ( 2014) [2014] Download
  125. Pohl Zdeněk :  Simulátor rozpoznávání pohybu v obrazech s nízkým rozlišením, ( 2014) [2014] Download
  126. Přibyl P., Altmann J., Bárta D., Bureš P., Frič V., Gelová E., Plíhal Jiří, Pliška Z., Přibyl O., Rajnoch J., Řehák J., Smutný M., Stárek T., Švédová Z., Věžník M., Vlčinský J. :  Názvosloví pozemních komunikací - Část 5: Dopravní telematika, ( 2014) [2014] Download
  127. Machan J., Nedoma P., Plíhal Jiří :  PŘEDSTAVENÍ PROJEKTU ICOMPOSE - INTEGROVANÉ ŘÍZENÍ SDRUŽENÉHO POHONU A DUÁLNÍHO ZDROJE ENERGIE U PLNĚ ELEKTRICKÝCH VOZIDEL , Sborník příspěvků, p. 245-253 , Eds: Schejbal Jan, Mezinárodní vědecká konference soudního inženýrství /23./, (Brno, CZ, 24.01.2014-25.01.2014) [2014] Download
  128. Plíhal Jiří :  Modul pro převod vozidlových signálů na standard PS2, ŠKODA AUTO a.s, (Praha 2013) [2013]
  129. Kadlec Jiří, Sebroňová E. :  Setkání zástupců v oblasti ICT v ČR a seznámení s draftem pracovního programu pro oblast ICT v H2020, (Praha, CZ, 13.09.2013-13.09.2013) [2013]
  130. Machan J., Nedoma P., Plíhal Jiří :  Stanovení vlivu asistenčních systémů na průběh stability jízdy v rámci projektu E-VECTOORC , Sborník příspěvků odborné konference, p. 107-115 , Eds: kpt. Ing.Omelka Jaroslav, mjr. Ing. Kuběnka Rudolf, Zvýšení bezpečnosti provozu vozidel ozbrojených sil, (Vyškov, CZ, 05.11.2013-06.11.2013) [2013] Download
  131. Savitski D., Plíhal Jiří, Nedoma P., Machan J., Ivanov V., Augsburg K. :  Cost Functions for Assessment of Vehicle Dynamics , Proceedings of the 2013 IEEE Symposium Series on Computational Intelligence, IEEE SSCI 2013, p. 48-55, IEEE Symposium Series on Computational Intelligence (SSCI) 2013, (Singapore, SG, 16.04.2013-19.04.2013) [2013] Download DOI: 10.1109/CIES.2013.6611728
  132. Machan J., Nedoma P., Plíhal Jiří :  Palubní testovací asistenční jednotka, ( 2013) [2013] Download
  133. Kadlec Jiří :  EDKDSP: Reprogrammable Floating Point Accelerators on KINTEX FPGA with HDMI , 2013 Design, Automation and Test in Europe, DATE 2013 Design, Automation and Test in Europe, (Grenoble, FR, 2013.03.18-2013.03.22) [2013] Download
  134. Sýkora Jaroslav :  Composing Data-driven Circuits Using Handshake in the Clock-Synchronous Domain , Proceedings of the 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), p. 211-214, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), (Karlovy Vary, CZ, 08.04.2013-10.04.2013) [2013] Download DOI: 10.1109/DDECS.2013.6549818
  135. Kubátová H., Hochberger Ch., Daněk Martin, Sick B. :  Architecture of Computing Systems - ARCS 2013, Springer, (Heidelberg 2013) Lecture Notes in Computer Science vol.7767 , International Conference of the Architecture of Computing Systems - ARCS 2013/ 26./, (Prague, CZ, 19.02.2013-22.02.2013) [2013] Download
  136. Machan J., Nedoma P., Plíhal Jiří :  Představení projektu E-Vectoorc , ExFos 2013 (Expert Forensic Science), p. 118-127 , Eds: Bradáč Albert, XXII. mezinárodní vědecká konference soudního inženýrství, (Brno, CZ, 25.01.2013-26.01.2013) [2013] Download
  137. Ivanov V., Augsburg K., Savitski D., Plíhal Jiří, Nedoma P., Machan J. :  Advanced Cost Functions for Evaluation of Lateral Vehicle Dynamics , Proceedings of the FISITA 2012 World Automotive Congress, p. 425-440, FISITA 2012 World Automotive Congress, (Beijing, CN, 27.11.2012-30.11.2012) [2013] Download DOI: 10.1007/978-3-642-33795-6_35
  138. Plíhal Jiří :  Modul pro zpracování signálu inkrementálního čidla, ŠKODA AUTO a.s, (Praha 2012) Research Report 2338 [2012]
  139. Plíhal Jiří, Machan J., Nedoma P. :  Rozšířené asistenční systémy pro zvýšení aktivní bezpečnosti osádky vozidla , Zvýšení bezpečnosti provozu vozidel ozbrojených sil, p. 15-21, Zvýšení bezpečnosti provozu vozidel ozbrojených sil 2012, (Vyškov, CZ, 06.11.2012-07.11.2012) [2012] Download
  140. Pohl Zdeněk :  DMA jednotka pro BCE v systémech s AXI sběrnicí, ( 2012) [2012] Download
  141. Van Tol M. W., Pohl Zdeněk, Tichý Milan :  A Framework for Self-adaptive Collaborative Computing on Reconfigurable Platforms , Advances in Parallel Computing, p. 579-586, International Conference on Parallel Computing, (Ghent, BE, 30.08.2011-02.09.2011) [2012] Download DOI: 10.3233/978-1-61499-041-3-579
  142. Bartosinski Roman, Daněk Martin, Sýkora Jaroslav, Kohout Lukáš, Honzík P. :  Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs , Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, p. 375-376 , Eds: Morawiec Adam, Hinderscheit Jinnie , Conference on Design & Architectures for Signal & Image Processing, (Karlsruhe, DE, 23.10.2012-25.10.2012) [2012] Download
  143. Bartosinski Roman, Daněk Martin, Sýkora Jaroslav, Kohout Lukáš, Honzík P. :  Video Surveillance Application Based on Application Specific Vector Processors , Proceedings of the 2012 Conference on Design & Architectures for Signal & Image Processing, p. 248-255 , Eds: Morawiec Adam, Hinderscheit Jinnie , Conference on Design & Architectures for Signal & Image Processing, (Karlsruhe, DE, 23.10.2012-25.10.2012) [2012] Download
  144. Bartosinski Roman, Daněk Martin, Sýkora Jaroslav, Kohout Lukáš :  Foreground Detection and Image Segmentation in a Flexible ASVP Platform for FPGAs, ( 2012) [2012]
  145. Sýkora Jaroslav :  Optimizing C Compiler and an ELF-Based Toolchain for the PicoBlaze Processor, ( 2012) [2012] Download
  146. Sýkora Jaroslav, Bartosinski Roman, Kohout Lukáš, Daněk Martin, Honzík P. :  Reducing Instruction Issue Overheads in Application-Specific Vector Processors , Proceedings of the 15th Euromicro Conference on Digital System Design, DSD 2012, p. 600-607 , Eds: Niar Smail, 15th Euromicro Conference on Digital System Design, (Cesme, TR, 05.09.2012-08.09.2012) [2012] Download
  147. Lohstroh J., Schutz E., Kadlec Jiří :  ARTEMIS Brokerage Event Call 2012, (Praha, CZ, 17.01.2012-18.01.2012) [2012] Download
  148. Kadlec Jiří :  In-circuit, Run-time Compiler of Finite State Machines for the UTIA EdkDSP Customizable Accelerators , Fourth Friday Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications, p. 32-33 , Eds: Silvano Cristina, Agosta Giovanni, Cardoso Joao, DATE 2012 - Design Automation and Test in Europe conference and exhibition, (Dresden, DE, 12.03.2012-16.03.2012) [2012] Download
  149. Sýkora Jaroslav, Kohout Lukáš, Bartosinski Roman, Kafka Leoš, Daněk Martin, Honzík P. :  The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Processor , Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 62-67 , Eds: Raik, J. , Stopjaková, V. , Jenihhin, M. , Vierhaus, H., T. , Pleskacz, W. , Ubar, R. , 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Tallinn, EE, 18.04.2012-20.04.2012) [2012] Download DOI: 10.1109/DDECS.2012.6219026
  150. Honzík P., Kadlec Jiří :  Dynamic Placement Applications into Self Adaptive Network on FPGA , 2011 IEEE 14th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS 2011), p. 453-456 , Eds: Vierhaus Heinrich T. , Pawlak Adam, Schölzel Mario, Steininger Andreas, Kraemer Rolf, Raik Jaan, 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011), (Cottbus, DE, 13.04.2011-15.04.2011) [2011] Download DOI: 10.1109/DDECS.2011.5783135
  151. Mazanec Tomáš :  MIMO techniques for xDSL, ÚTIA AV ČR, (Praha 2011) Research Report 2305 [2011] Download
  152. Kadlec Jiří :  Účast ČR ve společných technologických iniciativách ARTEMIS a ENIAC , Hovory s informatiky, p. 95-113 , Eds: Klímová H., Kuželová D., Šíma J., Wiedermann J., Žák S., Hovory s informatiky 2011, (Praha, CZ, 25.10.2011) [2011] Download
  153. Pohl Zdeněk, Kloub Jan :  DSP Library for UTIA BCE platform, ( 2011) [2011]
  154. Pohl Zdeněk :  Resource Management: Implementation and performance results, ( 2011) [2011]
  155. Kadlec Jiří, Bystřická J., Rakušanová K. :  Český národní informační den společných technologických iniciativ ARTEMIS a ENIAC, (Praha, CZ, 21.03.2011) [2011]
  156. Kloub Jan, Mazanec Tomáš, Heřmánek Antonín :  Heterogeneous Platform for Stream Based Applications on FPGAs , Proceedings of 21st International Conference on Field Programmable Logic and Applications, p. 401-404, FPL 2011 International Conference on Field Programmable Logic and Applications (21th), (Chania, GR, 05.09.2011-07.09.2011) [2011] Download
  157. Pohl Zdeněk, Tichý Milan :  Resource Management for the Heterogeneous Arrays of Hardware Accelerators , Proceedings of 21st International Conference on Field Programmable Logic and Applications, p. 486-489, FPL 2011 International Conference on Field Programmable Logic and Applications (21th), (Chania, GR, 05.09.2011-07.09.2011) [2011] Download
  158. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout Lukáš :  Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors , 2011 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, p. 525-532 , Eds: Kitsos Paris, 14th Euromicro Conference on Digital System Design Architectures, Methods and Tools DSD 2011, (Oulu, FI, 31.08.2011-02.09.2011) [2011] Download
  159. Bartosinski Roman :  The LD-RLS algorithm with directional forgetting implemented on a vector-like hardware accelerator , ICASSP 2011: IEEE International Conference on Acoustics, Speech, and Signal Processing, p. 1657-1660, ICASSP 2011: IEEE International Conference on Acoustics, Speech, and Signal Processing, (Praha, CZ, 22.05.2011-27.05.2011) [2011] Download DOI: 10.1109/ICASSP.2011.5946817
  160. Kadlec Jiří :  Funkční vzorek systému pro vizualizaci funkce a ovládání vzdáleného HW s VLAM periferními moduly, ( 2011) [2011]
  161. Kadlec Jiří, Kafka Leoš, Svozil J. :  NOR FLASH Core – Funkční vzorek řadiče paměti Intel StrataFlash, ( 2011) [2011]
  162. Kadlec Jiří, Kafka Leoš, Svozil J. :  SPI FLASH Core – Funkční vzorek řadiče paměti SPI Serial Flash, ( 2011) [2011]
  163. Kadlec Jiří, Kafka Leoš, Svozil J. :  AD Core – Funkční vzorek řadiče A/D převodníku se sběrnicí SPI, ( 2011) [2011]
  164. Kadlec Jiří, Kafka Leoš, Stejskal J. :  BASIC IO CORE – Funkční vzorek řadiče elektronického potenciometru, ( 2011) [2011]
  165. Kadlec Jiří, Kafka Leoš, Svozil J. :  DA Core - Funkční vzorek řadiče D/A převodníku se sběrnicí SPI, ( 2011) [2011]
  166. Kadlec Jiří, Kafka Leoš, Stejskal J. :  PWM Core - funkční vzorek generátoru pulzně šířkové modulace, ( 2011) [2011]
  167. Kadlec Jiří, Kafka Leoš, Svozil J. :  FG Core - funkční vzorek generátoru kmitočtu, ( 2011) [2011]
  168. Kadlec Jiří, Kafka Leoš, Svozil J. :  FC Core - funkční vzorek čítače frekvence, ( 2011) [2011]
  169. Kadlec Jiří, Kafka Leoš, Svozil J. :  LCD Core - Funkční vzorek řadiče LCD displeje, ( 2011) [2011]
  170. Pacull F., Bertels K., Daněk Martin, Urlini G. :  SMECY: Smarti Multi-core Embedded SYstems (Special Session) , Proceedings of 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011, p. 427-428, 21st Great Lakes Symposium on VLSI Design - GLSVLSI 2011, (Lausanne, CH, 02.05.2011-04.05.2011) [2011] Download
  171. Sýkora Jaroslav, Kafka Leoš, Daněk Martin, Kohout Lukáš :  Analysis of Execution Efficiency in the Microthreaded Processor UTLEON3 , Architecture of Computing Systems - ARCS 2011, p. 110-121 , Eds: Berekovic Mladen, ARCS 2011. International Conference on Architecture of computing systems /24./, (Camo, IT, 24.02.2011-25.02.2011) [2011] DOI: 10.1007/978-3-642-19137-4_10
  172. Heřmánek Antonín, Kuneš Michal, Tichý Milan :  Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique , Proceedings of the International Conference on Field Programmable Logic and Applications, p. 336-339, 20th International Conference on Field Programmable Logic and Applications, (Milano, IT, 31.08.2010-02.09.2010) [2010] Download
  173. Kloub Jan, Honzík Petr, Daněk Martin :  Reconfigurable Hardware Objects for Image Processing on FPGAs , Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 121-122, Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vienna, AT, 14.04.2010-16.04.2010) [2010] Download
  174. Mazanec Tomáš, Heřmánek Antonín, Kamenický Jan :  Blind image deconvolution algorithm on NVIDIA CUDA platform , Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 125-126, The 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vienna, AT, 14.04.2010-16.04.2010) [2010] Download
  175. Daněk Martin, Kafka Leoš, Kohout Lukáš, Sýkora Jaroslav :  Instruction Set Extensions for Multi-Threading in LEON3 , Proceedings of the13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, p. 237-242, DDECS 2010 : 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, (Vídeň, AT, 14.04.2010-16.04.2010) [2010] Download
  176. Kloub Jan :  Graphic Computing Element Description, ( 2010) [2010]
  177. Tichý Milan :  ÚTIA spoluvyvíjí přijímač pro DVB-T2 , Akademický bulletin AV ČR, 10 (2009), p. 15-15 [2009] Download
  178. Kuneš Michal, Heřmánek Antonín, Tichý Milan :  Reducing Power Measurements of UTIA DSP platform by Cloack-Gating Technique, Report on Experimental Results, ( 2009) [2009]
  179. Kadlec Jiří :  Floating Point Accelerator Families bce_fp01_1x1_0_plbw_v1_|10|20|30|_a bce_fp01_1x2_0_plbw_v1_|10|20|30|40|_a for Xilinx Spartan3 DSP 1800 Board and Petalogix Petalinux-v0.40-final, ( 2009) [2009]
  180. Schier Jan, Kovář Bohumil :  Using Matlab in quantitative analysis of yeast growth , Technical Computing Prague 2009, p. 1-9, Technical Computing Prague 2009, (Praha, CZ, 19.11.2009) [2009] Download
  181. Kadlec Jiří :  Demonstrator of Floating Point Accelerators bce_fp01_1x1_0_plbw_v1_1|10|20|30_a Kit: Xilinx Spartan-3AN OS: petalinux-v0.40-final, ( 2009) [2009]
  182. Tichý Milan, Pohl Zdeněk, Heřmánek Antonín :  Reed-Solomon Coder Simulation, ( 2009) [2009]
  183. Kloub Jan, Mazanec Tomáš, Heřmánek Antonín, Tichý Milan :  DVB-T2 Receiver Prototype: Physical Layer, ( 2009) [2009]
  184. Heřmánek Antonín, Mazanec Tomáš, Tichý Milan :  DVB-T2 Receiver: Physical Layer Simulator, ( 2009) [2009]
  185. Schier Jan :  Counting of yeast colonies in Petri dish images, ( 2009) [2009]
  186. Daněk Martin, Kadlec Jiří, Nelson B. :  Proceedings 19th International Conference on Field Programmable Logic and Applications (FPL), ÚTIA AV ČR, (Praha 2009) , FPL 2009 19th International Conference on Field Programmable Logic and Applications, (Praha, CZ, 31.08.2009-02.09.2009) [2009]
  187. Pohl Zdeněk, Tichý Milan :  Self-adaptive LMS filter, ( 2009) [2009]
  188. Kovář Bohumil :  Automatická detekce a odhad počtu kolonií kvasinek v Petriho miskách, ( 2009) [2009]
  189. Mazanec Tomáš :  Application of CUDA in DSP: Implementation of FIR filter and Cross Ambiguity Function, ( 2009) [2009]
  190. Schier Jan :  Preprocessing of images of Petri dishes, ( 2009) [2009]
  191. Kadlec Jiří, Kadlecová Milada :  ARTEMIS / ENIAC Joint Undertaking - Seminář ke 2. výzvě, (Praha, CZ, 02.03.2009) [2009]
  192. Kafka Leoš, Daněk Martin :  Nástroj pro přípravu emulace časově anotovaného netlistu, ( 2008) [2008]
  193. Kafka Leoš, Daněk Martin :  RETAC demo – emulátor poruch v2.0, ( 2008) [2008]
  194. Kafka Leoš :  Vkládání poruch do emulovaného ASIC netlistu pomocí dynamické rekonfigurace FPGA, ( 2008) [2008]
  195. Kovář Bohumil :  RIPAC Frontend - Metodologie tvorby bloků v Simulinku, ( 2008) [2008]
  196. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří :  PicoBlaze lekce 4: Aplikace pro výuku asembleru procesoru PicoBlaze, ( 2008) [2008]
  197. Kloub Jan, Schier Jan :  Vyhodnocování růstu kolonií kvasinek Saccharomyces cerevisia s použitím akcelerátoru Uni1P/DX64, ( 2008) [2008]
  198. Kohout Lukáš :  Floating Point Accelerators for MicroBlaze - Partial Runtime Reconfiguration, ( 2008) [2008]
  199. Stejskal Jaroslav :  Zpracování akustických signálů pomocí FPGA, ( 2008) [2008]
  200. Stejskal Jaroslav, Svozil Jiří, Kafka Leoš, Kadlec Jiří :  Řadiče periferií pro vývojovou desku Spartan3E Starter Kit, ( 2008) [2008]
  201. Matulík Radim :  FPGA Embedded Audio Output, ( 2008) [2008]
  202. Pohl Zdeněk, Kadlec Jiří, Tichý Milan :  Adaptive Noise Canceller Migration Demo, ( 2008) [2008]
  203. Kovář Bohumil, Kloub Jan, Schier Jan, Heřmánek Antonín :  Rapid Prototyping Platform For Reconfigurable Image Processing , Technical computing Prague 2008. 16th annual conference proceedings, p. 62-62, Technical Computing Prague 2008 /16./, (Praha, CZ, 11.11.2008-11.11.2008) [2008] Download
  204. Kadlec Jiří, Kadlecová Milada, Daněk Martin :  Workshop on Embedded Systems Education and Training, (Athény, GR, 05.06.2008) [2008]
  205. Kloub Jan :  Aplikační příručka k vývojové desce Uni1P a modulům DX64, ( 2008) [2008]
  206. Daněk Martin, Philippe J.-M., Bartosinski Roman, Honzík Petr, Gamrat Ch. :  Self-Adaptive Networked Entities for Building Pervasive Computing Aschitectures , International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, p. 94-105 , Eds: Hornby Gregory S., Sekanina Lukáš, Haddow Pauline C., International Conference on Evolvable Systems: From Biology to Harware, 8th International Conference, ICES 2008, (Praha, CZ, 22.09.2008-24.09.2008) [2008] Download
  207. Daněk Martin, Kadlec Jiří, Bartosinski Roman, Kohout Lukáš :  Increasing the Level of Abstraction in FPGA-based Designes , International Conference on Field Programmable Logic and Applications, p. 5-10 , Eds: Kebschull Udo, International Conference on Field Programmable Logic and Applications, (Heidelberg, DE, 08.09.2008-10.09.2008) [2008] Download
  208. Kloub Jan :  Architektura systému pro dynamicky rekonfigurovatelný komunikační terminál , Počítačové architektury a diagnostika 2008 Sborník příspěvků, p. 51-56 , Eds: Plíva Zdeněk, Novák Ondřej, Jeníček Jiří, Rozkovec Martin, Počítačové architektury a diagnostika 2008, (Hejnice, CZ, 15.09.2008-17.09.2008) [2008] Download
  209. Kohout Lukáš :  Architektury číslicových systémů využívající princip samoadaptace , Počítačové architektury a diagnostika 2008 Sborník příspěvků, p. 57-62 , Eds: Plíva Zdeněk, Novák Ondřej, Jeníček Jiří, Rozkovec Martin, Počítačové architektury a diagnostika 2008, (Hejnice, CZ, 15.09.2008-17.09.2008) [2008] Download
  210. Heřmánek Antonín, Kuneš Michal :  Alamouti core v Celoxica HandelC na Xilinx ML402, ( 2008) [2008]
  211. Kloub Jan, Heřmánek Antonín :  Implementace ethernetového rozhraní s podporou protokolu UDP, ( 2008) [2008]
  212. Kadlec Jiří :  Design Flow for Reconfigurable MicroBlaze Accelerators , 4th International Workshop on Reconfigurable Communication Centric System-on-Chips Workshop Proceedings, p. 133-140 , Eds: Moreno Manuel J., Madrenas Jordi, Sassatelli Gilles, Hübner Michael, Zipf Peter, ReCoSoC 2008 4th Reconfigurable Communication-centric Systems-on-Chip workshop, (Barcelona, ES, 09.07.2008-11.07.2008) [2008]
  213. Kadlec Jiří, Daněk Martin, Kohout Lukáš :  Proposed architecture of configurable, adaptable SoC , The IET Irish Signals and Systems Conference ISSC 2008, p. 368-373 , Eds: Morgan Fearghal, Glavin Martin, Jones Edward, The Institution of Engineering and Technology Irish Signals and Systems Conference, ISSC 2008, (Galway, IE, 18.06.2008-19.06.2008) [2008]
  214. Kadlec Jiří, Kadlecová Milada :  ARTEMIS / ENIAC Joint Undertaking Information event, (Praha, CZ, 16.05.2008) [2008]
  215. Kafka Leoš :  Analysis of Applicability of Partial Runtime Reconfiguration in Fault Emulator in Xilinx FPGAs , Proceedings 2008 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 178-181 , Eds: Straube Bernd, Drutarovský Miloš, Renovell Michel, Gramata Peter, Fischerová Mária, IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. DDECS 2008 /11./, (Bratislava, SK, 16.04.2008-18.04.2008) [2008]
  216. Bartosinski Roman :  Processor Expert AutoSAR-Simulink Library, ( 2008) [2008]
  217. Bartosinski Roman :  Knihovna Proseccor Expert-Simulink, ( 2008) [2008]
  218. Kloub Jan, Mazanec Tomáš, Heřmánek Antonín :  HW Platform for Software Defined Radio, ( 2007) [2007]
  219. Schier Jan, Kovář Bohumil, Zuzaňák J. :  Configuration System for a DSP/FPGA-Based Embedded Accelerator , Digital Technologies 2007 Proceedings, p. 1-4 , Eds: Jarina Roman, Digital Technologies 2007, (Žilina, SK, 29.11.2007-30.11.2007) [2007]
  220. Kloub Jan, Heřmánek Antonín :  Akcelerátor pro dekódování konvolučního a Reed-Solomonova zabezpečovacího kódu , Technical computing Prague 2007. 15th annual conference proceedings, p. 74-74, Technical computing Prague 2007. 15th annual conference, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  221. Kovář Bohumil :  Detekce významných bodů v integrální hranové mapě, ( 2007) [2007]
  222. Mazanec Tomáš :  Simulator of ADSL Physical Layer , Technical computing Prague 2007. 15th annual conference proceedings, p. 1-10, Technical computing Prague 2007. 15th annual conference, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  223. Kovář Bohumil, Schier Jan :  Kompresní algoritmy a jejich implementace, ÚTIA AV ČR, (Praha 2007) Research Report 2191 [2007]
  224. Bartosinski Roman :  RCCOM - podpora komunikace s kartami s FPGA z prostředí Matlab a Matlab/Simulink, ( 2007) [2007]
  225. Kovář Bohumil, Schier Jan :  Kompresní algoritmy a jejich implementace, ( 2007) [2007]
  226. Kovář Bohumil :  Detekce významných bodů v integrální hranové mapě, ÚTIA AV ČR, (Praha 2007) Research Report 2186 [2007]
  227. Kloub Jan, Heřmánek Antonín :  Implementace akcelerátorů pro dekódování konvolučního a Reed-Solomonova zabezpečovacího kódu na obvodech FPGA, ( 2007) [2007]
  228. Kloub Jan, Heřmánek Antonín :  Akcelerátor pro výpočet odezvy ADSL vedení, ( 2007) [2007]
  229. Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Zuzaňák J. :  Configuration System for a DSP/FPGA-Based Embedded Accelerator , Digital Technologies 2007 Book of Abstracts, p. 32-33 , Eds: Jarina Roman, Digital Technologies 2007, (Žilina, SK, 30.11.2007) [2007]
  230. Kafka Leoš, Daněk Martin, Novák O. :  Preservation of Circuit Structure and Timing during Fault Emulation in FPGA , IP 07 IP Based Electronic System Conference & Exhibition Proceedings, p. 493-497 , Eds: Saucier Gabriele, Nguyen Huy-Nam, IP 07 IP Based Electronic System Conference & Exhibition, (Grenoble, FR, 05.12.2007-06.12.2007) [2007]
  231. Kvasnička M., Heřmánek Antonín, Kuneš Michal :  Akcelerátor výpočetu věrohodnostní funkce pro systémy pasivní radiolokace, ( 2007) [2007]
  232. Mazanec Tomáš, Heřmánek Antonín :  Webová aplikace pro simulaci ADSL přenosu, ( 2007) [2007]
  233. Mazanec Tomáš, Heřmánek Antonín :  Matlab ADSL Toolbox ver. 11, ( 2007) [2007]
  234. Kadlec Jiří :  Embedded Development Environment for a Family of Xilinx FPGA , Regional Conference on Embedded and Ambient Systems Book of Abstracts, p. 16-16 , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) [2007]
  235. Kadlec Jiří :  Preparation ARTEMIS and the Czech republic: current status and related issues , Regional Conference on Embedded and Ambient Systems Book of Abstracts, p. 15-15 , Eds: Varga Antila K., Kiss Ákos, Marsiske Stefan, Vásárhelyi József, RCEAS 2007 First Regional Conference on Embedded and Ambient Systems, (Budapešť, HU, 22.11.2007-24.11.2007) [2007]
  236. Pohl Zdeněk, Kadlec Jiří, Tichý Milan :  Adaptive Noise Canceller Demo based on the LS Lattice Filter, ( 2007) [2007] Download
  237. Kafka Leoš, Daněk Martin, Novák O. :  A Novel Emulation Technique that Preserves Circuit Structure and Timing , International Symposium on System-on-Chip 2007 Proceedings, p. 15-18 , Eds: Nurmi J., Takala J., Vainio O., International Symposium on System-on-Chip 2007 /9./, (Tampere, FI, 20.11.2007-21.11.2007) [2007]
  238. Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Zuzaňák J. :  Simulink Model Converter for Embedded Video Accelerator , Technical Computing Prague 2007, p. 79-79, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  239. Bartosinski Roman, Daněk Martin, Honzík Petr, Kadlec Jiří :  Modelling Self-Adaptive Networked Entities in Matlab/Simulink , Technical Computing Prague 2007, p. 1-8, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  240. Stružka P., Waszniowski L., Bartosinski Roman, Bysterský T. :  Design of Control Application Using Processor Expert Blockset , Technical Computing Prague 2007, p. 1-8, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  241. Bartosinski Roman, Kadlec Jiří :  Simulation of MCU hardware peripherals , Technical Computing Prague 2007, p. 1-7, Technical Computing Prague 2007, (Praha, CZ, 14.11.2007-14.11.2007) [2007]
  242. Bartosinski Roman, Hanzálek Z., Stružka P., Waszniowski L. :  Integrated Environment for Embedded Control Systems Design , Proceedings of the 21st IEEE International Parallel & Distributed Processing Symposium, p. 1-8, 21st IEEE International Parallel & Distributed Processing Symposium, (Long Beach, US, 26.03.2007-30.03.2007) [2007]
  243. Kafka Leoš :  A Novel Emulation Technique that Preserves Circuit Structure and Timing , Počítačové architektury a diagnostika 2007 Sborník příspěvků, p. 99-104 , Eds: Vavřička Vlastimil, Počítačové architektury a diagnostika 2007, (Srní, CZ, 17.09.2007-19.09.2007) [2007]
  244. Mazanec Tomáš, Heřmánek Antonín :  Simulace ekvalizérů TEQ pro ADSL toolbox: výsledky experimentů, ÚTIA AV ČR, (Praha 2007) Research Report 2194 [2007]
  245. Kadlec Jiří, Bartosinski Roman, Daněk Martin :  Accelerating MicroBlaze Floating Point Operations , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL), p. 621-624 , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) [2007]
  246. Pohl Zdeněk, Tichý Milan :  RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator , Proceedings 2007 International Conference on Field Programmable Logic and Applications (FPL), p. 774-777 , Eds: Bertels Koen, Najjar Walid, Genderen Arjan, Vassiliadis Stamatis, International Conference on Field Programmable Logic and Applications. FPL 2007, (Amsterdam, NL, 27.08.2007-29.08.2007) [2007]
  247. Svozil Jiří, Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří :  PicoBlaze lekce 3: sériová komunikace RS232 a testování IP jader pomocí procesoru PicoBlaze, ÚTIA AV ČR, (Praha 2007) [2007]
  248. Heřmánek Antonín, Dušek J., Kloub Jan :  Demonstrátor Reed-Solomonova kodéru a dekodéru s ethernetovým rozhraním implentovaný v FPGA, ÚTIA AV ČR, (Praha 2007) [2007]
  249. Kohout Lukáš :  Částečná dynamická rekonfigurace na FPGA obvodech firmy Xilinx s nástroji ISE a EDK verze 8.2i, ÚTIA AV ČR, (Praha 2007) [2007]
  250. Kohout Lukáš :  Bluetooth modul WT12, ÚTIA AV ČR, (Praha 2007) [2007]
  251. Kafka Leoš, Bartosinski Roman, Daněk Martin :  Accessory Tools for Partial Dynamic Reconfiguration on Xilinx FPGAs, ÚTIA AV ČR, (Praha 2007) [2007]
  252. Stejskal Jaroslav, Kafka Leoš, Kadlec Jiří :  PicoBlaze lekce 2: generování VHDL a implementace systému s procesorem PicoBlaze do FPGA v prostředí Xilinx ISE, ÚTIA AV ČR, (Praha 2007) [2007]
  253. Svozil Jiří, Kafka Leoš, Kadlec Jiří :  PicoBlaze lekce 1: assembler, C překladač a simulační prostředí, ÚTIA AV ČR, (Praha 2007) [2007]
  254. Mazanec Tomáš, Heřmánek Antonín :  Simulátor fyzické vrstvy ADSL modemu, ÚTIA AV ČR, (Praha 2007) [2007]
  255. Kohout Lukáš :  Částečná dynamická rekonfigurace na FPGA obvodech firmy XILINX, ÚTIA AV ČR, (Praha 2007) [2007]
  256. Heřmánek Antonín, Dušek J. :  Reed Solomonův kodér a dekodér pro FPGA, ÚTIA AV ČR, (Praha 2007) [2007]
  257. Mazanec Tomáš, Heřmánek Antonín :  Simulace ADSL downstream přenosu Webová aplikace, ÚTIA AV ČR, (Praha 2007) [2007]
  258. Kvasnička M., Heřmánek Antonín, Kuneš Michal :  Implementace akcelerátoru pro výpočet pro výpočet věrohodnostní funkce, ÚTIA AV ČR, (Praha 2007) [2007]
  259. Mazanec Tomáš, Heřmánek Antonín :  ADSL - ekvalizační techniky, ÚTIA, (Praha 2007) Research Report 2184 [2007]
  260. Bartosinski Roman :  RCCOM knihovna - podpora hardware-in-the-loop simulace na FPGA z prostředí Matalb/Simulink, ÚTIA AV ČR, (Praha 2007) [2007]
  261. Pohl Zdeněk :  Komunikace pro adm-xrc-4sx pomocí ZBIT pamětí, ÚTIA AV ČR, (Praha 2007) [2007]
  262. Pohl Zdeněk :  Komunikace pro adm-xrc-4sx, ÚTIA AV ČR, (Praha 2007) [2007]
  263. Pohl Zdeněk :  Double Precision System Generator Library, ÚTIA AV ČR, (Praha 2007) [2007]
  264. Pohl Zdeněk :  Výstup z Celoxica DK jako BlackBox komponenta Systém Generátoru, ÚTIA AV ČR, (Praha 2007) [2007]
  265. Pohl Zdeněk, Daněk Martin :  Flash Formatter, ÚTIA AV ČR, (Praha 2007) [2007]
  266. Kafka Leoš, Daněk Martin :  Development Kit for PicoBlaze Processor in FITkit Board, ÚTIA AV ČR, (Praha 2007) [2007]
  267. Kafka Leoš :  Development Kit for Xilinx PicoBlaze, ÚTIA AV ČR, (Praha 2007) [2007] Download
  268. Kadlec Jiří, Daněk Martin, Schier Jan, Kohout Lukáš, Kafka Leoš, Kloub Jan, Stejskal Jaroslav, Svozil Jiří :  Identifikace limitací dosavadních technologií v kontextu projektu VLAM, ÚTIA AV ČR, (Praha 2007) Research Report 2183 [2007]
  269. Bartosinski Roman, Hanzálek Z., Waszniowski L., Stružka P. :  Processor Expert Enhances Matlab Simulink Facilities for Embedded Software Rapid Development , Emerging Technologies and Factory Automation 2006, p. 1-4, IEEE Conference on Emerging Technologies and Factory Automation 2006, (Prague, CZ, 20.09.2006-22.09.2006) [2006]
  270. Schier Jan, Kovář Bohumil :  A DSP/FPGA-based accelerator for video , Digital Technologies 2006, p. 1-5, Digital Technologies 2006, (Žilina, SK, 01.12.2006) [2006]
  271. Šůcha P., Hanzálek Z., Heřmánek Antonín, Schier Jan :  Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm , IEEE Symposium on Industrial Embedded Systems - IES 2006, Proceedings of, p. 1-10, IEEE Symposium on Industrial Embedded Systems - IES 2006, (Antibes Juan-Les-Pins, FR, 18.10.2006-20.10.2006) [2006]
  272. Pohl Zdeněk, Kadlec Jiří :  RLS Lattice Demo, ÚTIA AV ČR, (Praha 2006) [2006]
  273. Heřmánek Antonín, Kuneš Michal, Kvasnička M. :  Comuputation of Long Time Cross Ambiguity function using reconfigurable HW , Proceedings of the 6th IEEE International Symposium on Signal Processing and Information Technology, p. 1-5, IEEE International Symposium on Signal Processing and Information Technology. ISSPIT'06 /6./, (Vancouver, CA, 27.08.2006-30.08.2006) [2006]
  274. Schier Jan, Kovář Bohumil :  A DSP/FPGA-based accelerator for video processing , Digital Technologies 2006 Book of Abstracts, p. 13-13, Digital Technologies 2006, (Žilina, SK, 01.12.2006) [2006]
  275. Tichý Milan :  Fast Adaptive Filtering Algorithms and their Implementation using Reconfigurable Hardware and Log Arithmetic, ČTUV, (Praha 2006) [2006]
  276. Kovář Bohumil, Schier Jan, Zemčík P., Herout A., Beran V. :  Simulink as Tool for Prototyping Reconfigurable Image Processing Applications , Technical computing Prague 2006. 14th annual conference proceedings, p. 52-57 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) [2006]
  277. Kadlec Jiří, Kadlecová Milada :  Přechod ústavů Akademie věd na V.V.I . a jeho dopad na běžící projekty 6.RP EU, (Praha, CZ, 14.11.2006) [2006]
  278. Kadlec Jiří, Kadlecová Milada :  Robotics in IST FP7, (Praha, CZ, 07.11.2006) [2006]
  279. Bartosinski Roman, Kadlec Jiří :  Hardware co-simulation with communication server from MATLAB/Simulink , Technical computing Prague 2006. 14th annual conference proceedings, p. 13-20 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) [2006]
  280. Mazanec Tomáš :  Advanced Algorithms for Equalization on ADSL Channel , Technical computing Prague 2006. 14th annual conference proceedings, p. 68-75 , Eds: Procházka A., Technical computing Prague 2006 /14./, (Prague, CZ, 26.10.2006) [2006]
  281. Heřmánek Antonín, Kuneš Michal, Kvasnička M. :  Using Reconfigurable HW for High Dimensional CAF Computation , Proceeding 2006 International Conference on Field Programmable Logic and Applications, p. 641-644 , Eds: Koch A., Leong P., Boemo E., International Conference on Field Programmable Logic and Applications. 2006, (Madrid, ES, 28.08.2006-30.08.2006) [2006]
  282. Tichý Milan, Schier Jan, Gregg D. :  FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic , Proceedings of The 2006 IEEE Workshop on Signal Processing Systems Design and Implementation, p. 342-347 , Eds: Badawy W., Boumaiza S., IEEE Workshop on Signal Processing Systems Design and Implementation. 2006, (Banff, CA, 02.10.2006-04.10.2006) [2006]
  283. Tichý Milan, Schier Jan, Gregg D. :  Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA , Reconfigurable Computing: Architecures and Applications. Proceedings of the Second International Workshop ARC, p. 311-316 , Eds: Bertels K., Cardoso J. M. P., Vassiliadis S., The Second International Workshop on Reconfigurable Computing ARC 2006, (Delft, NL, 01.03.2006-03.03.2006) [2006]
  284. Tichý Milan, Nisbet A., Gregg D. :  GSFAP adaptive filtering using log arithmetic for rescouse-constrained embedded systems , FPGA 2006. Fourteenth ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, p. 236-236 , Eds: Wilton S., DeHon A., FPGA 2006. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /14./, (Monterey, US, 22.02.2006-24.02.2006) [2006]
  285. Ozer E., Tichý Milan, Gregg D. :  Automatic customization of embedded applications for enhanced performance and reduced power using optimizing compiler techniques , Proceedings of the 12th Workshop on Compilers for Parallel Computers. CPC 2006, p. 16-27 , Eds: Arenaz M., Doallo R., Fraguela B.B., Workshop on Compilers for Parallel Computers. CPC 2006. /12./, (A Coruňa, ES, 09.01.2006-11.01.2006) [2006]
  286. Kafka Leoš, Novák O. :  FPGA-based fault simulator , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 274-278 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
  287. Kadlec Jiří, Daněk Martin :  Design and verification methodology for reconfigurable designs in Atmel FPSLIC , Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits adn Systems, p. 79-80 , Eds: Reorda M. S., Novák O., Straube B., DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems, (Prague, CZ, 18.04.2006-21.04.2006) [2006]
  288. Tichý Milan :  Floatin-point Arithmetic Library and the FAL maltlab Toolbox. (program), ÚTIA AV ČR, (Praha 2006) [2006]
  289. Tichý Milan :  Multi-Floating-Point-Arithmetic Fast Adaptive Filtering Algorithm Library for Matlab. (program), ÚTIA AV ČR, (Praha 2006) [2006]
  290. Tichý Milan :  Log Units, (N)LMS and GSFAP Hardware Macros and the Hardware Simulation Infrastructure. (program), ÚTIA AV ČR, (Praha 2006) [2006]
  291. Tichý Milan :  Adaptive Filtering Algorithms Implementation and Evaluation of their Filtering Properties, ÚTIA AV ČR, (Praha 2006) Research Report 2164 [2006]
  292. Tichý Milan :  Review and Classification of Adaptive Filtering Algorithms for the LNS Arithmetic, ÚTIA AV ČR, (Praha 2006) Research Report 2162 [2006]
  293. Tichý Milan :  Efficient Floating-point-like Implementation of the (N)LMS and GSFAP Algorithms in FPGA, ÚTIA AV ČR, (Praha 2006) Research Report 2165 [2006]
  294. Heřmánek Antonín, Schier Jan, Šůcha P., Hanzálek Z. :  Optimization of finite interval CMA implementation for FPGA , Proceedings of the IEEE Workshop on Signal Processing Systems. SiPS 2005, p. 1-6, SiPS 2005. IEEE Workshop on Signal Processing Systems, (Athens, GR, 02.11.2005-04.11.2005) [2005]
  295. Kafka Leoš, Matoušek Rudolf :  Design Retiming in HDL , Proceedings of Workshop 2005, p. 258-259 , Eds: Říha B., ČVUT, (Praha 2005) , Annual University-Wide Seminar. WORKSHOP 2005 /13./, (Praha, CZ, 21.03.2005-25.03.2005) [2005]
  296. Honzík Petr :  Rozbor a implementace dynamické rekonfigurace pro obvody FPGA , Počítačové architektury a diagnostika, p. 55-60 , Eds: Lórencz R., Buček J., Zahradnický T., ČVUT FEL, (Praha 2005) , Počítačové architektury a diagnostika 2005. PAD 2005, (Lázně Sedmihorky, CZ, 21.09.2005-23.09.2005) [2005]
  297. Kafka Leoš :  An FPGA-based fault injector for TSC circuits , Počítačové architektury a diagnostika, p. 77-81 , Eds: Lórencz R., Buček J., Zahradnický T., ČVUT FEL, (Praha 2005) , Počítačové architektury a diagnostika 2005. PAD 2005, (Lázně Sedmihorky, CZ, 21.09.2005-23.09.2005) [2005]
  298. Daněk Martin, Heřmánek Antonín, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  GIN - notetaker for blind people: An example of using dynamic reconfiguration of FPGAs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 15-18 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
  299. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs , ACACES 2005. Advanced Computer Architecture and Compilation for Embedded Systems, p. 35-38 , Eds: Bosschere K., HiPEAC Network of Excellence, (Ghent 2005) , ACACES 2005., (L'Aquila, IT, 26.07.2005) [2005]
  300. Šůcha P., Heřmánek Antonín, Schier Jan, Hanzálek Z. :  Optimization of Finite Interval CMA Implementation for FPGA, ÚTIA AV ČR, (Praha 2005) Research Report 2127 [2005]
  301. Kafka Leoš, Kubalík P., Kubátová H., Novák O. :  Fault classification for self-checking circuits implemented in FPGA , Proceedings of the 8th IEEE Workshop on Design and Diagnostics of Electronics Circuits and Systems, p. 228-231 , Eds: Takách G., Hlawiczka A., Sziray J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronics Circuits and Systems Workshop /8./, (Sopron, HU, 13.04.2005-16.04.2005) [2005]
  302. Heřmánek Antonín, Schier Jan :  FPGA implementation of Finite Interval CMA , Proceedings of the first annual IEEE BENELUX/DSP Valley Signal Processing Symposium. SPS-DARTS 2005, p. 97-100, IEEE, (Antverpy 2005) , SPS-DARTS 2005 Signal Processing Symposium /1./, (Antverpy, BE, 19.04.2005-20.04.2005) [2005]
  303. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs , Proceedings of the 8th IEEE Workshop on Designs and Diagnostics of Electronic Circuits nad Systems, p. 129-136 , Eds: Takách G., Hlawiczka A., Sziraj J., University of West Hungary, (Sopron 2005) , IEEE Design and Diagnostics of Electronic Circuits nad Systems Workshop (DDECS 2005) /8./, (Sopron, HU, 13.04.2005-16.04.2005) [2005]
  304. Kafka Leoš, Kielbik R., Matoušek Rudolf, Moreno J. M. :  VPart: An automatic partitioning tool for dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth International Symposium on Field-Programmable Gate Arrays, p. 263 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  305. Nasi K., Daněk Martin, Karoubalis T., Pohl Zdeněk :  Figaro: An automatic tool flow for designs with dynamic reconfiguration. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 262 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  306. Bartosinski Roman, Daněk Martin, Honzík Petr, Matoušek Rudolf :  Dynamic reconfiguration in FPGA-based SoC designs. Abstract , FPGA 2005 - ACM/SIGDA Thirteenth ACM International Symposium on Field-Programmable Gate Arrays, p. 274 , Eds: Schmidt H., Wilton S., ACM, (Monterey 2005) , FPGA 2005 /13./, (Monterey, US, 20.02.2005-22.02.2005) [2005]
  307. Kadlec Jiří, Kadlecová Milada :  Výměna zkušeností řešitelů evropských projektů po 1. kole auditů 6. RPEU, (Praha, CZ, 03.11.2005) [2005]
  308. Heřmánek Antonín, Kvasnička M., Pelant M., Plšek R. :  Passive coherent location FPGA implementation of the cross ambiguity function , Proceedings of SPIE: Signal Processing Symposium 2005, p. 1-7, Signal Processing Symposium 2005, (Wilga, PL, 03.06.2005-05.06.2005) [2005]
  309. Heřmánek Antonín, Kvasnička M. :  Pasivní koherentní radiolokátor FPGA implementace signálového akcelerátoru , Sborník 3. mezinárodní konference Aktivní a Pasivní radiotechnické systémy, p. 1-9, Aktivní a Pasivní radiotechnické systémy, (Brno, CZ, 04.05.2005-05.05.2005) [2005]
  310. Zemčík P., Herout A., Beran V., Fučík A., Schier Jan :  Reconfigurable image processing architecture , ICGST International Conference on Graphics, Vision and Image Processing. GVIP-05, p. 1-6, International Conference on Graphics, Vision and Image Processing, (Káhira, EG, 19.12.2005-21.12.2005) [2005]
  311. Kafka Leoš, Daněk Martin :  RETAC Application Notes 2005, ÚTIA AV ČR, (Praha 2005) [2005]
  312. Pohl Zdeněk, Kadlec Jiří, Šůcha P., Hanzálek Z. :  Performance tuning of interative algorithms in signal processing , Proseedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 699-702 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 24.08.2005-26.08.2005) [2005]
  313. Daněk Martin, Pohl Zdeněk, Nasi K., Karoubalis T. :  Figaro - an automatic tool flow for designs with dynamic reconfiguration , Proceedings of the 2005 International Conference on Field Programmable Logic and Applications. FPL 2005, p. 590-593 , Eds: Rissa T., Wilton S., Leong P., FPL 2005. International Conference on Field Programmable Logic and Applications, (Tampere, FI, 22.08.2006-26.08.2005) [2005]
  314. Žalud L., Matoušek Rudolf :  ARGOS-ORPHEUS system for remote exploration of hazardous environment , Proseedings of the 7th WSEAS International Conference on Automatic Control Modelling and Simulation, p. 10-15 , Eds: Srovnal V., Mastorakis N., ACMOS 05. Automatic Control Modelling and Simulation /7./, (Praha, CZ, 13.03.2005-15.03.2005) [2005]
  315. Kadlec Jiří :  Scalable Floating Point Simulation Package float-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) [2005]
  316. Kadlec Jiří :  Double Precision Simulation Package double-dk-rel2. (Program), ÚTIA AV ČR, (Praha 2005) [2005]
  317. Schier Jan, Kovář Bohumil, Zemčík P., Herout A., Beran V. :  Reconfigurable image processing architecture with simulink prototyping support , Technical Computing Prague 2005. 13th Annual Conference Proceeding, p. 1-4 , Eds: Moler C., Procházka A., Walden B., MATLAB 05. Annual Conference of Technical Computing Prague 2005 /13./, (Praha, CZ, 15.11.2005) [2005]
  318. Kadlec Jiří, Gook R. :  Floating point controller as a picoblaze network on a single spartan 3 FPGA , MAPLD 2005 International Conference Proceeding, p. 1-11 , Eds: Katz R. B., MAPLD 2005 International Conference, (Washington, US, 07.09.2005-09.09.2005) [2005]
  319. Mazanec Tomáš, Heřmánek Antonín, Matoušek Rudolf :  Model of the transmission system of the reconnaissance system Orpheus , Technical Computing Prague 2005 : 13th Annual Conference Proceedings, p. 1-4 , Eds: Moler C., Procházka A., Walden B., MATLAB 05. Technical Computing 2005 /13./, (Praha, CZ, 15.11.2005) [2005]
  320. Bartosinski Roman, Stružka P., Waszniowski L. :  Peert-blockset for processor export and matlab/simuling integration , Technical Computing Prague 2005 : 13th Annual Conference Proceedings, p. 1-8 , Eds: Moler C., Procházka A., Walden B., MATLAB 05. Technical Computing Prague 2005, (Praha, CZ, 15.11.2005) [2005]
  321. Kadlec Jiří :  Reconfigurable floating point co-processor for atmel FPSLIC , MAPLD 2005 International Conference Proceedings, p. 1-12 , Eds: Katz R. B., MAPLD 2005 International Conference Proceedings, (Washington, US, 07.09.2005-09.09.2005) [2005]
  322. Matulík Radim :  GIN z kouzelné lampy míří do kapes , Lidové noviny vol.17, 288 (2004), p. 22 [2004]
  323. Šůcha P., Pohl Zdeněk, Hanzálek Zdeněk :  Scheduling of iterative algorithms on FPGA with pipelined arithmetic unit , Real-Time and Embedded Technology and Applications Symposium, p. 404-412, IEEE Real-Time and Embedded Technology and Applications Symposium 2004 /10./, (Toronto, CA, 25.05.2004-28.05.2004) [2004] Download
  324. Honzík Petr :  AVR core supported dynamic reconfiguration , POSTER 2004. Proceedings of the 8th International Student Conference on Electrical Engineering, p. 1-5 , Eds: Husník L., Lhotská L., International Student Conference on Electrical Engineering. POSTER 2004 /8./, (Praha, CZ, 20.05.2004) [2004]
  325. Matoušek Rudolf, Honzík Petr :  SDIO Interface for the FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2118 [2004]
  326. Kadlec Jiří, Daněk Martin, Honzík Petr :  Reconfigurable Scrolling Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2117 [2004]
  327. Kadlec Jiří, Daněk Martin, Honzík Petr :  Reconfigurable 24-Bit Floating-Point Coprocessor Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2116 [2004]
  328. Honzík Petr :  Getting Started with AVG-GCC, ÚTIA AV ČR, (Praha 2004) Research Report 2115 [2004]
  329. Daněk Martin, Matoušek Radomil :  FLASH Read Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2114 [2004]
  330. Daněk Martin, Matoušek Rudolf :  Overlay Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2113 [2004]
  331. Daněk Martin, Matoušek Rudolf :  FLASH Formatter for the FLASH Expansion Board, ÚTIA AV ČR, (Praha 2004) Research Report 2112 [2004]
  332. Daněk Martin, Matoušek Rudolf :  Random Access FLASH Controller for Atmel FPSLIC, ÚTIA AV ČR, (Praha 2004) Research Report 2111 [2004]
  333. Honzík Petr :  Communication Library for AVR Microcontrollers, ÚTIA AV ČR, (Praha 2004) Research Report 2110 [2004]
  334. Pohl Zdeněk, Heřmánek Antonín :  ADPCM IP Cores, ÚTIA AV ČR, (Praha 2004) Research Report 2109 [2004]
  335. Pohl Zdeněk, Heřmánek Antonín :  ADPCM Demo, ÚTIA AV ČR, (Praha 2004) Research Report 2108 [2004]
  336. Schier Jan, Heřmánek Antonín :  Using logarithmic arithmetic to implement the Recursive Least Squares (QR) algorithm in FPGA , Field-Programmable Logic and Applications. 14th International Conference FPL 2004. Proceedings, p. 1149-1151, International Conference FPL 2004 /14./, (Antverp, BE, 30.08.2004-01.09.2004) [2004]
  337. Heřmánek Antonín, Schier Jan, Regalia P. :  Architecture design for FPGA implementation of finite interval CMA , Proceedings of the 12th European Signal Processing Conference, p. 1-4 , Eds: Hlawatsch F., Matz G., Rupp M., EUSIPCO 2004 /12./, (Vienna, AT, 06.09.2004-10.09.2004) [2004]
  338. Kadlec Jiří, Kadlecová Milada :  Workshop FET. Future and Emerging Technologies in the frame of IST FP6, (Praha, CZ, 14.05.2004) [2004]
  339. Daněk Martin, Honzík Petr, Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk :  Reconfigurable system-on-a-programmable-chip platform , Proceedings of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, p. 21-28, IEEE Workshop on DDECS 2004 /7./, (Stará Lesná, SK, 18.04.2004-21.04.2004) [2004]
  340. Schier Jan, Heřmánek Antonín :  FPGA implementation of recursive QR update using LNS arithmetic , Proceedings of the 4th IEEE Benelux Signal Processing Symposium, p. 1-4, SPS 2004 /4./, (Hilvarenbeek, NL, 15.04.2004-16.04.2004) [2004]
  341. Daněk Martin, Kolář J. :  FPGA modelling for high-performance algorithms. Abstract , FPGA 2004 ACM/SIGDA Twelfth International Symposium on Field-Programmable Gate Arrays, p. 251, FPGA 2004 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays /12./, (Monterey, US, 22.02.2004-24.02.2004) [2004]
  342. Tichý Milan :  HSLA Version 4.0.0a Demo. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  343. Líčko Miroslav, Matulík Radim, Matoušek Rudolf, Kadlec Jiří :  Prototyping Board for CAK. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  344. Schier Jan :  QR-RLS - Celoxica RC1000 Demo. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  345. Tichý Milan :  HSLA Version 3.0.0 Evaluation Package. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  346. Líčko Miroslav, Kadlec Jiří :  An Introduction to the Xilinx System Generator. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  347. Matulík Radim :  GIN - Pocket Notebook with Synthetic Speech Output for the Blind Users. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  348. Matoušek Rudolf, Líčko Miroslav, Kadlec Jiří :  European Logarithmic Microprocessor. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  349. Pohl Zdeněk, Schier Jan, Líčko Miroslav, Heřmánek Antonín, Tichý Milan :  Logarithmic arithmetic for real data types and support for Matlab/Simulink based rapid-FPGA-prototyping , Proceedings of the International Parallel and Distributed Processing Symposium. IPDPS 2003, p. 1-6 , Eds: Werner B., IEEE Computer Society Press, (Los Alamitos 2003) , IEEE IPDPS 2003, (Nice, FR, 22.04.2003-26.04.2003) [2003]
  350. Matoušek Rudolf :  Dynamic reconfiguration of FPGAs: a case study , Počítačové Architektury & Diagnostika PAD 2003, p. 17-23 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) [2003]
  351. Pohl Zdeněk :  Logarithmic number system and floating-point arithmetics an FPGA , Počítačové Architektury & Diagnostika PAD 2003, p. 9-16 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) [2003]
  352. Daněk Martin :  Integrated iterative approach to FPGA placement , Počítačové Architektury & Diagnostika PAD 2003, p. 43-50 , Eds: Kotásek Z., Růžička R., Sekanina L., VUT, (Brno 2003) , PAD 2003 Počítačové Architektury & Diagnostika, (Zvíkovské Podhradí, CZ, 24.09.2003-26.09.2003) [2003]
  353. Pohl Zdeněk, Kadlec Jiří, Líčko Miroslav, Matoušek Rudolf, Tichý Milan :  Lattice IP Core used in Real-time Lattice Demo on XESS Board. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  354. Pohl Zdeněk, Kadlec Jiří, Tichý Milan :  RLS Lattice - Celoxica RC200 Demo. (Program), ÚTIA AV ČR, (Praha 2003) [2003]
  355. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří :  Dynamic reconfiguration of Atmel FPGAs , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-4 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
  356. Líčko Miroslav, Schier Jan :  FPGA Prototyping Using Extensions to MATLAB/Simulink , UK ACM SIGDA 3rd Workshop on Electronic Design Automation, p. 1-3 , Eds: Hettiaratchi S., University of Southampton, (Southampton 2003) , UK ACM SIGDA Workshop on Electronic Design Automation /3./, (Southampton, GB, 11.09.2003-12.09.2003) [2003]
  357. Heřmánková Dana, Kadlecová Milada, Drath P., Hanahoe H. :  Introduction to the 6th Framework Programme Coordinating EC research projects, ( 2003) , (Praha, CZ, 07.04.2003-08.04.2003) [2003]
  358. Heřmánková Dana, Rektorová Alice, Trojanowski K., Drath P., Schoefield M., Siemaszko A. :  Opportunities in the European Union's IST Programme, ( 2003) , (Mragowo, PL, 23.11.2001-24.11.2001) [2003]
  359. Heřmánek Antonín, Regalia P. :  Comparison of two recursive constant modulus algorithms , Proceedings of the 4th Electronic Circuits and Systems Conference, p. 159-162 , Eds: Butaš J., Stopjaková V., Slovak University of Technology, (Bratislava 2003) , International Conference on Electronic Circuits and Systems. /4./, (Bratislava, SK, 11.09.2003-12.09.2003) [2003]
  360. Matoušek Rudolf, Pohl Zdeněk, Daněk Martin, Kadlec Jiří :  Dynamic reconfiguration of FPGAs , Recent Trends in Multimedia Information Processing. Proceedings, p. 288-291 , Eds: Šimák B., Zahradník P., Czech Technical University, (Prague 2003) , International Workshop on Systems, Signals and Image Processing /10./, (Praha, CZ, 10.09.2003-11.09.2003) [2003]
  361. Schier Jan, Kadlec Jiří :  Using logarithmic arithmetic for FPGA implementation of the Givens rotations , Proceedings of the Sixth Baiona Workshop on Signal Processing in Communications, p. 199-204 , Eds: Mosquera C., Perez-Gonzales F., Universidade de Vigo, (Vigo 2003) , Baiona Workshop on Signal Processing Communications /6./, (Baiona, ES, 08.09.2003-10.09.2003) [2003]
  362. Líčko Miroslav, Schier Jan, Tichý Milan, Kühl M. :  MATLAB/Simulink based methodology for rapid-FPGA-prototyping , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 984-987 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. T., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field-Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) [2003]
  363. Heřmánek Antonín, Pohl Zdeněk, Kadlec Jiří :  FPGA implementation of the adaptive lattice filter , Field-Programmable Logic and Applications. Proceedings of the 13th International Conference, p. 1095-1098 , Eds: Cheung P. Y. K., Constantinides G. A., de Sousa J. D., Springer, (Berlin 2003) Lecture Notes in Computer Science. vol.2778 , Field Programmable Logic and Applications /13./, (Lisabon, PT, 01.09.2003-03.09.2003) [2003]
  364. Matoušek Rudolf, Daněk Martin, Pohl Zdeněk, Kadlec Jiří :  Dynamic runtime partial reconfiguration in FPGA , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 294-298 , Eds: Nouza J., Drábková J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]
  365. Daněk Martin, Muzikář Z. :  Evolutionary techniques in physical design for FPGAs , ECMS 2003. 6th International Workshop on Electronics, Control, Measurement and Signals, p. 274-278 , Eds: Drábková J., Nouza J., Technical University, (Liberec 2003) , ECMS 2003 /6./, (Liberec, CZ, 02.06.2003-04.06.2003) [2003]
  366. Tichý Milan :  HSLA Package version 3.0.0. Matlab HSLA Toolbox 32- and 19-bit TWIN LNS ALU, ÚTIA AV ČR, (Praha 2003) Research Report 2086 [2003]
  367. Pohl Zdeněk, Matoušek Rudolf, Kadlec Jiří, Tichý Milan, Líčko M. :  Lattice adaptive filter implementation for FPGA , FPGA 2003 ACM/SIGDA Eleventh ACM International Symposium on Field-Programmable Gate Arrays, p. 246, ACM, (Monterey 2003) , FPGA 2003, (Monterey, US, 23.02.2003-25.02.2003) [2003]
  368. Grabowiecki T., Kadlec Jiří, Čerans K., Pihl T., Weber B., Zergoi T. :  Ideal-ist Conference Information Society Technology in the 6th Framework Programme, ( 2002) , (Varšava, PL, 25.11.2002-26.11.2002) [2002]
  369. Smith B., Edin M., Hillerová E., Kadlecová Milada, Heřmánková Dana, Kadlec Jiří :  e-2002 e-Work & e-Business Conference, ( 2002) , (Praha, CZ, 16.10.2002-18.10.2002) [2002]
  370. Líčko Miroslav, Schier Jan, Pohl Zdeněk, Kadlec Jiří, Tichý Milan, Matoušek Rudolf, Heřmánek Antonín :  Logarithmic Arithmetic for Real Data Types and Support for MATLAB/SIMULINK Based Rapid-FPGA-Prototyping, ÚTIA AV ČR, (Praha 2002) Research Report 2069 [2002]
  371. Líčko Miroslav :  Fast Adaptive Controllers, ÚTIA AV ČR, (Praha 2002) Research Report 2068 [2002]
  372. Tichý Milan :  Adaptive Filtering Algorithms and the Logarithmic Number System Arithmetic, ÚTIA AV ČR, (Praha 2002) Research Report 2067 [2002]
  373. Schier Jan :  Using the System-C library for bit-true simulations in MATLAB , MATLAB 2002. Sborník příspěvků 10. ročníku konference, p. 497-504, VŠCHT, (Praha 2002) , MATLAB 2002, (Praha, CZ, 07.11.2002) [2002]
  374. Pohl Zdeněk, Líčko M. :  Utilization of the HSLA toolbox for the FPGA prototyping , MATLAB 2002. Sborník příspěvků 10. ročníku konference, p. 462-468, VŠCHT, (Praha 2002) , MATLAB 2002, (Praha, CZ, 07.11.2002) [2002]
  375. Líčko Miroslav, Métais B., Tichý Milan, Matoušek Rudolf :  Extension for Xilinx System Generator - logarithmic arithmetic blockset , MATLAB 2002. Sborník příspěvků 10. ročníku konference, p. 280-284, VŠCHT, (Praha 2002) , MATLAB 2002, (Praha, CZ, 07.11.2002) [2002]
  376. Heřmánek Antonín, Regalia P. :  Recursive Finite Interval Constant Modulus Algorithm for blind equalization , MATLAB 2002. Sborník příspěvků 10. ročníku konference, p. 133-141, VŠCHT, (Praha 2002) , MATLAB 2002, (Praha, CZ, 07.11.2002) [2002]
  377. Albu F., Kadlec Jiří, Coleman N., Fagan A. :  The Gauss-Seidel Fast Affine Projection algorithm , IEEE Workshop on Signal Processing Systems. Proceedings, p. 109-114 , Eds: Parhi K., Shanbhag N., IEEE, (San Diego 2002) , SIPS 2002, (San Diego, US, 16.10.2002-18.10.2002) [2002]
  378. Albu F., Kadlec Jiří, Heřmánek Antonín, Fagan A., Coleman N. :  Analysis of the LNS implementation of the fast affline projection algorithms , Proceedings of the Irish Signals and Systems Conference 2002. ISSC 2002, p. 251-255 , Eds: Marnane W., Lightbody G., Pesch D., Institute of Technology, (Cork 2002) , Irish Signals and Systems Conference 2002, (Cork, IE, 25.06.2002-26.06.2002) [2002]
  379. Albu F., Kadlec Jiří, Coleman N., Fagan A. :  Pipelined implementations of the A Priory Error-Feedback LSL algorithm using logarithmic arithmetic , Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing, p. 2681-2684, IEEE, (Orlando 2002) , ICASSP 2002, (Orlando, US, 13.05.2002-17.05.2002) [2002]
  380. Matoušek Rudolf, Líčko Miroslav, Heřmánek Antonín, Softley C. :  Floating-Point-Like Arithmetic for FPGA , POSTER 2002, p. 2, FEL ČVUT, (Praha 2002) , International Student Conference on Electrical Engineering /6./, (Praha, CZ, 23.05.2002) [2002]
  381. Matoušek Rudolf, Tichý Milan, Pohl Zdeněk, Kadlec Jiří, Softley C. :  Logarithmic number system and floating-point arithmetics on FPGA , Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, p. 627-636 , Eds: Glesner M., Zipf P., Renovell M., Springer, (Berlin 2002) Lecture Notes in Computer Science. vol.2438 , International Conference FPL 2002 /12./, (Montpellier, FR, 02.09.2002-04.09.2002) [2002]
  382. Líčko Miroslav, Tichý Milan, Heřmánek Antonín, Matoušek Rudolf, Pohl Zdeněk :  Prototyping of DSP algorithms on FPGA , POSTER 2002, p. 2, FEL ČVUT, (Praha 2002) , International Student Conference on Electrical Engineering /6./, (Praha, CZ, 23.05.2002) [2002]
  383. Kadlec Jiří, Tichý Milan, Heřmánek Antonín, Pohl Z., Líčko M. :  Matlab Toolbox for high-level bit-exact emulation of HandelC VHDL FPGA designs , Design, Automation and Test in Europe DATE˙02, p. 264 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE˙02, (Paris, FR, 04.03.2002-08.03.2002) [2002]
  384. Matoušek R., Pohl Z., Kadlec Jiří, Tichý Milan, Heřmánek Antonín :  Logarithmic arithmetic core based RLS LATTICE implementation , Design, Automation and Test in Europe DATE 02, p. 271 , Eds: Sciuto D., Kloos C. D., IEEE, (Los Alamitos 2002) , Design, Automation and Test in Europe DATE 02, (Paris, FR, 04.03.2002-08.03.2002) [2002]
  385. Pleger R., Kadlec Jiří, Grabowiecki T., Kadlecová Milada, Krekels D., Heřmánek Antonín :  Ideal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Dresden, DE, 17.09.2001) [2001]
  386. Kadlec Jiří, Heřmánková Dana, Rektorová Alice, Drath P., Schoefield M., Martynovicz P. :  Opportunities in the European Union's IST Programme, ( 2001) , (Praha, CZ, 13.11.2001-14.11.2001) [2001]
  387. Kadlec Jiří, Kadlecová Milada, Pleger R., Grabowiecki T., Zergoi T., Krekels D. :  Ideal-ist Workshop European IT Research Programme (IST) Successful Proposal Writing, ( 2001) , (Praha, CZ, 26.09.2001) [2001]
  388. Kadlec Jiří, Heřmánková Dana, Trojanowski K., Drath P., Schoefield M., Burak R. :  Managing EC Research Project - Workshop and Brokerage, ( 2001) , (Praha, CZ, 11.12.2001) [2001]
  389. Kadlec Jiří, Albu F., Softley Ch., Matoušek Rudolf, Heřmánek Antonín :  RLS Lattice for Virtex FPGA using 32-bit and 20-bit Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2036 [2001]
  390. Kadlec Jiří, Heřmánek Antonín, Softley Ch., Matoušek Rudolf, Líčko Miroslav :  32-bit Logarithmic ALU for Handel-C 2.1 and Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2037 [2001]
  391. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Softley Ch. :  Pipelined Logarithmic 32bit ALU for Celoxica DK1, ÚTIA AV ČR, (Praha 2001) Research Report 2034 [2001]
  392. Coleman J. N., Kadlec Jiří, Matoušek Rudolf, Pohl Zdeněk, Heřmánek Antonín :  The European Logarithmic Microprocessor - a QRD RLS Applications, ÚTIA AV ČR, (Praha 2001) Research Report 2038 [2001]
  393. Albu F., Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Coleman J. N. :  A Comparison of FPGA Implementation of the A Priori Error-Feedback LSL Algorithm using Logarithmic Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2035 [2001]
  394. Matoušek Rudolf, Líčko Miroslav, Heřmánek Antonín, Softley Ch. :  Floating-Point-Like Arithmetic for FPGA, ÚTIA AV ČR, (Praha 2001) Research Report 2039 [2001]
  395. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín :  Implementation of Normalized RLS Lattice on Virtex, ÚTIA AV ČR, (Praha 2001) Research Report 2040 [2001]
  396. Coleman J. N., Kadlec Jiří :  Extended Precision Logarithmic Arithmetic , Signal Systems and Computers 2000, 34th Asilomar Conference on Signal Systems and Computers. Proceedings, p. 124-129, IEEE Signal Processing Society, (Monterey 2001) , Asilomar conference on Signal Systems and Computers /34./, (Monterey, US, 07.11.2000) [2001]
  397. Schier Jan, Kadlec Jiří, Moonen M. :  Implementing Advanced Equalization Algorithms using Simulink with Embedded Alpha AXP Coprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2013 [2001]
  398. Líčko Miroslav, Matoušek Rudolf, Pohl Zdeněk :  Utilization of Matlab for the logarithmic processor development , Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 222-225 , Eds: Procházka A., Uhlíř J., VŠCHT, (Praha 2001) , MATLAB 2001 /9./, (Praha, CZ, 11.10.2001) [2001]
  399. Líčko Miroslav, Pohl Zdeněk, Matoušek Rudolf, Heřmánek Antonín :  Tuning and implementation of DSP algorithms on FPGA , Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 226-230 , Eds: Procházka A., Uhlíř J., VŠCHT, (Praha 2001) , MATLAB 2001 /9./, (Praha, CZ, 11.10.2001) [2001]
  400. Heřmánek Antonín, Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav, Pohl Zdeněk :  Pipelined logarithmic 32bit ALU for Celoxica DK1 , Sborník příspěvků 9.ročníku konference MATLAB 2001, p. 72-80 , Eds: Procházka A., Uhlíř J., VŠCHT, (Praha 2001) , MATLAB 2001 /9./, (Praha, CZ, 11.10.2001) [2001]
  401. Kadlec Jiří, Coleman J. N. :  Extended Precision LNS Arithmetic, ÚTIA AV ČR, (Praha 2001) Research Report 2008 [2001]
  402. Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav :  FPGA Implementation of Logarithmic Unit Core, ÚTIA AV ČR, (Praha 2001) Research Report 2007 [2001]
  403. Kadlec Jiří, Matoušek Rudolf, Heřmánek Antonín, Líčko Miroslav, Softley Ch. :  Logarithmic ALU 32-bit for Handel C 2.1 and Celoxica DK1 , Celoxica User Conference. Proceedings, Celoxica, (Abington 2001) , Celoxica User Conference /1./, (Stratford, GB, 02.04.2001-04.04.2001) [2001] Download
  404. Albu F., Kadlec Jiří, Fagan A., Coleman J. N. :  Implementation of Error-Feedback RLS Lattice on Virtex using logarithmic arithmetic , Advances in Systems Science: Measurement, Circuits and Control. Proceedings, p. 517-521 , Eds: Mastorakis N. E., Pecorelli-Peres L. A., WSES Press, (Rethymno 2001) , WSES International Conference on Circuits, Systems, Communications and Computers. CSCC 2001 /5./, (Rethymno, GR, 08.07.2001-15.07.2001) [2001]
  405. Kadlec Jiří :  Review and Classification of RLS Array Algorithms for LNS Arithmetics, ÚTIA AV ČR, (Praha 2001) Research Report 2006 [2001]
  406. Kadlec Jiří, Matoušek Rudolf, Líčko Miroslav :  FPGA implementation of logarithmic unit core , Embedded Intelligence 2001, p. 547-554, Design & Elektronik, (Nürnberg 2001) , Embedded Intelligence 2001, (Nürnberg, DE, 14.02.2001-16.02.2001) [2001]
  407. Albu F., Kadlec Jiří, Softley Ch., Matoušek Rudolf, Heřmánek Antonín, Coleman J. N., Fagan A. :  Implementation of (Normalised) RLS Lattice on Virtex , Field-Programmable Logic and Applications. Proceedings, p. 91-100 , Eds: Brebner G., Woods R., Springer, (Berlin 2001) Lecture Notes in Computer Science. vol.2147 , International Conference FPL 2001, (Belfast, IE, 27.08.2001-29.08.2001) [2001]
  408. Kadlec Jiří :  Structure estimation for systems described by radial basis functions based on normalized QR filtering , Preprints of the 1st IFAC/IEEE Symposium on System Structure and Control, IFAC, (Prague 2001) , IFAC/IEEE Symposium on System Structure and Control /1./, (Prague, CZ, 29.08.2001-31.08.2001) [2001]
  409. Tichý Milan, Kovář Bohumil :  Parallel factorised algorithms for mixture estimation , Artificial Neural Nets and Genetic Algorithms. Proceedings, p. 410-413 , Eds: Kůrková V., Neruda R., Kárný M., Steele M. C., Springer, (Wien 2001) , International Conference on Artificial Neural Networks and Genetic Algorithms /5./, (Praha, CZ, 22.04.2001-25.04.2001) [2001]
  410. Coleman J. N., Chester E. I., Softley Ch., Kadlec Jiří :  Arithmetic on the European Logarithmic Microprocessor, ÚTIA AV ČR, (Praha 2001) Research Report 2012 [2001]
  411. Kadlecová Milada :  Determination of the Problems of Participation in IST for the NAS, ÚTIA AV ČR, (Praha 2001) Research Report 2014 [2001]
  412. Matoušek Rudolf, Strádal Vít :  LOGAT - Prelimitary Results, ÚTIA AV ČR, (Praha 2001) Research Report 2011 [2001]
  413. Schier Jan, Kadlec Jiří, Moonen M. :  Implementing advanced equalization algorithms using Simulink with embedded Alpha AXP coprocessor , Fifth IMA International Conference on Mathematics in Signal Processing, p. 11-14, University of Warwick, (Warwick 2000) , Mathematics in Signal Processing /5./, (Warwick, GB, 18.12.2000-20.12.2000) [2000]
  414. Hanzálek Zdeněk :  MATLAB based Petr Net analysis , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 78-83, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  415. Líčko Miroslav, Matoušek Rudolf, Heřmánek Antonín :  Alpha accelerator for RTW - Windows Target , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 197-201, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  416. Ondračka J., Oravec R., Kadlec Jiří, Cocherová E. :  Simulation of RLS and LMS algorithms for adaptive noise cancellation in MATLAB , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 301-305, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  417. Heřmánek Antonín, Matoušek Rudolf, Líčko Miroslav, Kadlec Jiří :  FPGA implementation of logarithmic unit , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 84-90, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  418. Strádal V., Matoušek Rudolf :  LOGAT , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 384-386, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  419. Matoušek Rudolf :  Traffic Toolbox , Sborník příspěvků 8. ročníku konference MATLAB 2000, p. 232-235, VŠCHT, (Praha 2000) , MATLAB 2000 /8./, (Praha, CZ, 01.11.2000) [2000]
  420. Hlavička J., Kadlec Jiří :  Vstup českých institucí do evropské informační společnosti , Česko-slovenská konference RUFIS 2000, p. 27-32, VUT, (Brno 2000) , Česko-slovenská konference RUFIS 2000., (Brno, CZ, 05.09.2000-06.09.2000) [2000]
  421. Tesař Ludvík, Berec Luděk, Dolanc G., Szederkényi G., Kadlec Jiří :  A toolbox for model-based fault detection and isolation , European Control Conference. ECC '99, VDI/VDE GMA, (Karlsruhe 1999) , European Control Conference. ECC '99, (Karlsruhe, DE, 31.08.1999-03.09.1999) [1999] Download
  422. Kadlec Jiří, Barbier A., de Castellane L., Gautier L.-P., Gourguechon S., Leroy S., Paturle A. :  Generation of Simulink S-functions, ÚTIA AV ČR, (Praha 1999) Research Report 1975 [1999]
  423. Hillerová E., Kadlec Jiří :  Konference k zahájení 5. rámcového programu Evropské unie, MŠMT, (Praha 1999) , Konference 5. rámcového programu Evropské unie /5./, (Praha, CZ, 05.02.1999) [1999]
  424. Hillerová E., Kadlec Jiří :  Informační den k programu IST, Technologické centrum AV ČR, (Praha 1999) , Seminář k programu IST /5./, (Praha, CZ, 23.09.1999) [1999]
  425. Kadlec Jiří, Matoušek Rudolf, Vialatte Christian, Coleman J. N. :  Port of Pascal FPGA-logarithmic-unit simulator to Simulink/RTW , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 84-90, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  426. Vialatte Christian, Kadlec Jiří :  RTW support for parallel 64-bit Alpha AXP-based platforms , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 238-244, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  427. Vialatte Christian, Kadlec Jiří :  RTW support for low cost C31 board , Sborník příspěvků 7. ročníku konference MATLAB '99, p. 231-237, VŠCHT, (Praha 1999) , MATLAB '99 /7./, (Praha, CZ, 03.11.1999) [1999]
  428. Swart P. J. F., Schier Jan, van Gemund A. J. C., van der Zwan W. F, Karelse J. P., Reijns G. L., van Genderen P., Ligthart L. P., Steenstra H. T. :  The COLORADO multistatic FMCW radar system , European Microwave. Proceedings, p. 449-454, Europeam Microwave Association, (London 1998) , European Microwave /28./, (Amsterdam, NL, 06.10.1998-08.10.1998) [1998]
  429. Schier Jan, van Gemund A. J. C. :  PTT and OTT Enhancement: Part 2. Final Report, Technical University, (Delft 1998) Research Report 1-68340-44(1998)04 [1998]
  430. Kárný Miroslav, Kadlec Jiří, Sutanto E. L. :  Quasi-Bayes estimation applied to normal mixture , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 77-82 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP '98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) [1998] Download
  431. Schier Jan, Kadlec Jiří, Böhm Josef :  Robust adaptive controller with fine grain parallelism , Preprints of the IFAC Workshop on Adaptive Systems in Control and Signal Processing, p. 436-441, IFAC, (Glasgow 1998) , Adaptive Systems in Control and Signal Processing, (Glasgow, GB, 26.08.1998-28.08.1998) [1998] Download
  432. Schier Jan :  Fast fixed-point algorithm for estimation of the system time lag , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 151-154 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP'98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) [1998]
  433. Kadlec Jiří :  Acceleration of computation-intensive algorithms on parallel Alpha AXP processors , Preprints of the 3rd European IEEE Workshop on Computer-Intensive Methods in Control and Data Processing, p. 89-98 , Eds: Rojíček J., Valečková M., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1998) , CMP'98 /3./, (Praha, CZ, 07.09.1998-09.09.1998) [1998] Download
  434. Kadlec Jiří, Schier Jan :  Numerical Analysis of a Normalized QR Filter Using Probability Description of Propagated Data, ÚTIA AV ČR, (Praha 1998) Research Report 1923 [1998]
  435. Kadlec Jiří, Schier Jan :  HSLA 3D Monitor Package, ÚTIA AV ČR, (Praha 1998) Research Report 1925 [1998]
  436. Kadlec Jiří, Schier Jan :  HSLA DSP Package, ÚTIA AV ČR, (Praha 1998) Research Report 1924 [1998]
  437. Kadlec Jiří, Schier Jan :  Results of the Global Probability Analysis Approach, ÚTIA AV ČR, (Praha 1998) Research Report 1926 [1998]
  438. Kadlec Jiří, Schier Jan :  Rapid prototyping of adaptive control algorithms on parallel multiprocessors , Signal Processing Symposium, p. 115-118, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) [1998] Download
  439. Schier Jan, van Gemund A. J. C., Reijns G. L. :  Real-time signal processing for an obstacle warning radar , Signal Processing Symposium, p. 167-170, IEEE, (Leuven 1998) , SPS '98, (Leuven, BE, 26.03.1998-27.03.1998) [1998]
  440. Kadlec Jiří, Vialatte Ch. :  Rapid prototyping and parallel processing under MATLAB 5 , MATLAB Conference 1997, p. 120-125, Kimhua Technology, (Seoul 1997) , MATLAB Conference '97, (Seoul, KR, 13.10.1997-14.10.1997) [1997]
  441. Kadlec Jiří :  Parallel processing on Alphas under MATLAB 5 , SOFSEM '97: Theory and Practice of Informatics, p. 440-448 , Eds: Plášil F., Jeffery K. G., Springer, (Berlin 1997) Lecture Notes in Computer Science. vol.1338 , Seminar on Current Trends in Theory and Practice of Informatics /24./, (Milovy, CZ, 22.11.1997-29.11.1997) [1997]
  442. Kadlec Jiří :  Para-Mat parallel processing under MATLAB , Simulationstechnik. Tagungsband, p. 684-687 , Eds: Kuhn A., Wenzel S., Vieweg, (Braunschweig 1997) ASIM vol.11 , Simulationstechnik. /11./, (Dortmund, DE, 11.11.1997-14.11.1997) [1997]
  443. Kadlec Jiří :  Rapid prototyping and parallel processing under MATLAB 5 , Tagungsband. 3. Zittauer Workshop Magnetlagertechnik, p. 101-104 , Eds: Hampel R., Worlitz F., IPM, (Zittau 1997) Wissenschftliche Berichte. vol.51 , Zittauer Workshop Magnetlagertechnik /3./, (Zittau, DE, 11.09.1997-12.09.1997) [1997] Download
  444. Schier Jan, van Gemund A. J. C. :  PTT and OTT Enhancement - Final Report, University of Technology, (Delft 1996) Research Report 1-68340-44(1996)10 [1996]
  445. Nedoma Petr, Kadlec Jiří :  Extension of MATLAB parallel accelerator , Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 155-160 , Eds: Berec L., Rojíček J., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1996) , European IEEE Workshop CMP'96 /2./, (Prague, CZ, 28.08.1996-30.08.1996) [1996]
  446. Schier Jan, Agterkamp H. J., van Gemund A. J. C., Reijns G. L., Lin H. X. :  Object tracking and tracing for multi-static FM-CW radar - incremental approach , Computer-Intensive Methods in Control and Signal Processing. Preprints of the 2nd European IEEE Workshop CMP'96, p. 151-154 , Eds: Berec L., Rojíček J., Kárný M., Warwick K., ÚTIA AV ČR, (Praha 1996) , European IEEE Workshop CMP'96 /2./, (Prague, CZ, 28.08.1996-30.08.1996) [1996]
  447. Kadlec Jiří, Nakhaee N. :  Alpha Bridge - high performance computing with MATLAB , Industrial Applications of MATLAB and Simulink for the Analysis of Electro- and Hydro- Mechanical Systems. Preprints, p. 11-16, Matlab UG, (Birmingham 1995) , Special Interest Meeting: Industrial Applications /1./, (Birmingham, GB, 20.09.1995) [1995] Download
  448. Schier Jan, Lin H. X., van Gemund A. J. C. :  Colorado System: Peak Tracking and Tracing Algorithm and its Parallel Implementation, Technische Universiteit, (Delft 1995) Research Report 95-101 [1995]
  449. Kadlec Jiří, Gaston F. M. F., Irwin G. W. :  The block regularised parameter estimator and its parallelisation , Identification and Optimization, Oriented for Use in Adaptive Control. Preprints, p. 107-120 , Eds: Böhm J., Rojíček J., ÚTIA AV ČR, (Praha 1995) , Summer School Course, (Prague, CZ, 17.07.1995-18.07.1995) [1995]
  450. McWhirter J. G., Walke R. L., Kadlec Jiří :  Normalised Givens rotations for recursive least squares processing , VLSI Signal Processing, VIII, p. 313-322 , Eds: Nishitani T., Parhi K., IEEE, (New York 1995) , IEEE Workshop on VLSI Signal Processing /8./, (Sakai, JP, 16.10.1995-18.10.1995) [1995]
  451. Kadlec Jiří :  [Recenze] , Automatica vol.31, 10 (1995), p. 1519-1521 [1995]
  452. Kadlec Jiří, Nakhaee N. :  Alpha-Bridge for MATLAB 4 , Transputer Applications and Systems '95. Proceedings, p. 175-189 , Eds: Cook B. M., Nixon P., IOS Press, (Harrogate 1995) , World Transputer Congress '95, (Harrogate, GB, 04.09.1995-06.09.1995) [1995]
  453. Kadlec Jiří, Gaston F. M. F. :  Identification with directional parameter tracking for high-performance fixed-point implementations , The Sixth Irish DSP and Control Colloquium, p. 215-222 , Eds: Gaston F., Dodds G., Techman, (Belfast 1995) , IDSPCC '95 /6./, (Belfast, IE, 19.06.1995-20.06.1995) [1995] Download
  454. Daněk Martin :  Timing-Driven Physical Design for Field-Programmable Gate Arrays. Ph.D. Thesis [0]
07.01.2019 - 08:39
Institute of Information Theory and Automation